Staff Packaging Engineer

Renesas Electronics Corporation; Bayan Lepas; On-site; MYR 120,000 - 180,000; Full time

Job summary

Renesas Electronics Corporation is seeking a senior packaging professional in Penang, Malaysia, to design and develop power packaging solutions (Power SiP/modules, flip-chip LGA, and multi-chip modules) and to collaborate with OSAT/CM partners for DOE-driven process optimization and production qualification.

The role requires strong communication, analytical skills, and a background in semiconductor power device packaging, with hands-on experience in leadframe and metallization processes.

Qualifications

• Master's or Bachelor's degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
• 5-15 years of relevant experience in package development (leadframe, laminate, power QFN/SiP/module, flip-chip packaging).
• Understanding of semiconductor power device package assembly processes, materials and technology.
• Knowledge of AutoCAD, Excel, PowerPoint, Word.
• Knowledge of wafer front-side / backside metallization, wire-bonding, flip chip, multi-chip module, SPC and statistical analysis.

Responsibilities

• Design and develop package and interconnect methods for Power SiP/modules, flip-chip LGA, multi-chip module and power device packaging.
• Work with OSAT/CM to develop DOEs to optimize processes and establish specifications.
• Collaborate with Product Groups and Reliability teams to qualify new packages and processes within required time frame.
• Ensure smooth production transition by resolving process integration issues and establishing production controls.
• Develop and maintain technical expertise on advances in leadframe, power SiP/modules, and flip chip interconnects.
• Address customer complaints with Marketing, Product groups, Quality and Operations to support growth.

Skills

AutoCAD

Excel

PowerPoint

Word

Strong communication

Analytical skills

Education

Master's or Bachelor's in Physics, Chemistry, Mechanical, Electrical or Materials Engineering

Tools

wafer metallization

Job description

Job Summary

We are actively advancing technological innovation in the semiconductor package assembly, with a focus on next generation packaging technologies such as PowerQFN, Flip-Chip, and SiP. In particular, the fields of AI, High Performance Computing (HPC), and Vertical Power Delivery (VPD) are rapidly increasing their demand for higher density, higher reliability, and high thermal dissipation package technologies.

This role offers the opportunity to work on cutting edge technologies — such as power packages for AI/HPC, VPD, Server VR core/peripheral, and Accelerator/GPU markets — and contribute to the development of packaging technologies that underpin innovations shaping society, including AI and next generation mobile computing.

Key Responsibilities

• Design and develop package and interconnect methods for Renesas’s packaging needs in the areas of Power SiP/modules, flip-chip LGA, multi-chip module and power device packaging


• Work with OSAT/CM to develop, run DOEs to optimize processes and establish process specifications.


• Work with Product Groups and Reliability teams to qualify new packages and processes within required time frame.


• Ensure smooth transition into production by resolving all process integration issues, establishing production controls and monitors, and monitoring / resolving process issues.


• Develop and maintain technical expertise on advances and innovations in advanced leadframe, power SiP/modules, and flip chip interconnects.


• Address internal and external customer complaints working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses.

Qualifications

• Masters / Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.


• 5-15 years of relevant experience in package development emphasizing leadframe, laminate, power QFN/SiP/module, flip-chip packaging, and wafer Front-Side (FSM) / Back-Side (BM) Metallization processing.


• Understanding of semiconductor power device package assembly processes, materials and technology. Knowledge of AutoCAD, Excel, PowerPoint, Word. Knowledge of wafer front-side / backside metallization, wire-bonding, flip chip, multi-chip module, SPC (Statistical Process Control) and statistical analysis.


• Strong interpersonal and communication skills.


• Strong analytical and presentation skills.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.