Senior Analog IC Layout Engineer (Hybrid)

Renesas; Bayan Lepas; Hybrid; MYR 100,000 - 130,000; Full time

Job summary

A leading semiconductor company based in Bayan Lepas, Malaysia, is seeking an experienced engineer to lead layout design projects. The ideal candidate will have a Bachelor's degree in Engineering, extensive experience in integrated analog circuit design, and proficiency in EDA tools like Cadence and Synopsys. The role involves working with junior engineers to deliver high-quality designs, attending project meetings, and ensuring on-time project completion. Competitive benefits and a hybrid work model are offered for a balanced work environment.

Benefits

Flexible work environment

Employee Resource Groups

Qualifications

• Experience with Cadence and Synopsys tools for layout design.
• Good communication skills in English and preferably Japanese.
• A minimum of 5-7 years’ experience in Analog IC layout design.

Responsibilities

• Lead junior engineers and deliver projects in collaboration.
• Utilize EDA tools for layout design and verification.
• Attend project meetings and assess project timelines.

Skills

Integrated analog circuit design

Chip layout in cell and block level

Layout techniques for matching

Experience in analog IC / mixed signals IC layout designs

Communication skills in English

Familiarity with EDA tools

Education

Bachelor’s degree in electrical/electronic engineering or related fields

Tools

Cadence

Synopsys

Job description

A leading semiconductor company based in Bayan Lepas, Malaysia, is seeking an experienced engineer to lead layout design projects. The ideal candidate will have a Bachelor's degree in Engineering, extensive experience in integrated analog circuit design, and proficiency in EDA tools like Cadence and Synopsys. The role involves working with junior engineers to deliver high-quality designs, attending project meetings, and ensuring on-time project completion. Competitive benefits and a hybrid work model are offered for a balanced work environment.