TLM Developer

Purview Services; Hyderabad; On-site; INR 900,000 - 1,300,000; Full time

Job summary

Purview Services is seeking an experienced hardware modeler to develop and maintain TLM 2.0/SystemC models for SoC components. You will create transactional models for IP blocks, processors, memories, and interconnects, and integrate these with simulators and verification environments.

You will collaborate with RTL, firmware, verification, and software teams to deliver reusable, configurable TLM components, debug issues, and drive performance and accuracy in co-simulation scenarios.

Qualifications

• 5-9 years of experience in TLM/SystemC development or hardware modeling.
• Strong hands-on experience with C++ and SystemC.
• Proficient in TLM 2.0 and transaction-level modeling concepts.
• Experience with TLM sockets, payloads, interfaces, and communication mechanisms.
• Understanding of SoC architecture, buses, memories, processors, and hardware interfaces.
• Knowledge of RTL concepts and Verilog/SystemVerilog is preferred.
• Experience with simulation/debugging tools and Linux environments.
• Knowledge of virtual prototyping or hardware/software co-simulation is an advantage.
• Strong debugging, analytical, and problem-solving skills.
• Good communication and collaboration abilities.

Responsibilities

• Develop and maintain TLM 2.0 / SystemC models for SoC and hardware components.
• Create transaction-level models for IP blocks, processors, memories, buses, peripherals, and interconnects.
• Implement and integrate TLM sockets, initiator/target interfaces, and communication channels.
• Develop functional and performance models for hardware/software co-simulation.
• Collaborate with RTL, firmware, verification, architecture, and software teams.
• Develop reusable and configurable TLM components.
• Integrate TLM models with simulation and verification environments.
• Debug functional, timing, communication, and integration issues in SystemC/TLM models.
• Develop test scenarios and validate model behavior against RTL/specifications.
• Support virtual platforms and early software development using TLM models.
• Optimize models for simulation performance and accuracy.
• Perform code reviews and maintain coding standards and technical documentation.
• Support model integration, regression testing, and continuous verification activities.

Skills

C++

SystemC

TLM 2.0

SoC architecture knowledge

Linux environments

Debugging

Communication

Job description

Key Responsibilities:

• Develop and maintain TLM 2.0 / SystemC models for SoC and hardware components.
• Create transaction-level models for IP blocks, processors, memories, buses, peripherals, and interconnects.
• Implement and integrate TLM sockets, initiator/target interfaces, and communication channels.
• Develop functional and performance models for hardware/software co-simulation.
• Work with hardware and verification teams to understand specifications and modeling requirements.
• Develop reusable and configurable TLM components.
• Integrate TLM models with simulation and verification environments.
• Debug functional, timing, communication, and integration issues in SystemC/TLM models.
• Develop test scenarios and validate model behavior against RTL/specifications.
• Support virtual platforms and early software development using TLM models.
• Optimize models for simulation performance and accuracy.
• Perform code reviews and maintain coding standards and technical documentation.
• Collaborate with RTL, firmware, verification, architecture, and software teams.
• Support model integration, regression testing, and continuous verification activities.

Required Skills & Qualifications:

• 5-9 years of experience in TLM/SystemC development or hardware modeling.
• Strong hands-on experience with C++ and SystemC.
• Good knowledge of TLM 2.0 and transaction-level modeling concepts.
• Experience with TLM sockets, payloads, interfaces, and communication mechanisms.
• Understanding of SoC architecture, buses, memories, processors, and hardware interfaces.
• Knowledge of RTL concepts and Verilog/SystemVerilog is preferred.
• Experience with simulation/debugging tools and Linux environments.
• Knowledge of virtual prototyping or hardware/software co-simulation is an advantage.
• Strong debugging, analytical, and problem-solving skills.
• Good communication and collaboration abilities.