Technical Lead – FPGA Verification (SV-UVM & DO-254)

Thales; Bengaluru; Sur place; INR 3 000 000 - 4 200 000; Plein temps

Résumé du poste

Thales India is seeking a Hands-on Technical Lead for FPGA IVV to drive SV-UVM transition and ensure DO-254 excellence. You will coach and directly execute complex verification tasks within the ECCi, Bangalore, contributing to aerospace/defence systems.

10+ years in FPGA/ASIC verification preferred, B.Tech/B.E or M.Tech in Electronics & Communication required. The role involves architecture of UVM components, mentoring, and delivering high-quality certification artifacts across DAL A/B with

Qualifications

• Experience: 10+ years in FPGA/ASIC Verification.
• Industry: Aerospace or Defense background would be an added advantage.
• Education: B.Tech/B.E or M.Tech/Masters in Electronics & Communication

Responsabilités

• Strategic Coaching & Mentorship
• Technical Guidance: Provide daily coaching to the engineering team on SV-UVM best practices and advanced debugging techniques.
• Skill Uplift: Adoption of latest tools, use of AI.
• Best Practices: Establish and maintain high-quality coding standards for SV-UVM and documentation for DO-254.
• Operational Execution
• Environment Development: Directly architect and code critical UVM components (UVM agent, Scoreboards) and complex test scenarios.
• Complex Interfaces Validation: Experience in verification of communication interfaces and bus standards (Example: AXI4, SPI, PCIe, UART, ARINC 818/664 ...)
• Problem Solving: Take the lead on the most challenging technical bottlenecks, from simulation mismatches to physical hardware-software integration issues.
• Certification & Delivery (DO-254)
• End-to-End Ownership: Be accountable for the full verification cycle (DAL A/B), ensuring 100% traceability between requirements and test results.
• Artifact Production: Hands-on drafting and review of critical certification documents.
• Schedule & Risk: Lead technical estimation, planning, and risk mitigation for the IVV scope.

Connaissances

SV-UVM

Technical leadership

Mentoring

AI adoption

AXI4

PCIe

ARINC 818/664

DO-254

UVM components

Formation

B.Tech/B.E or M.Tech/Masters in Electronics & Communication

Outils

Siemens-Questasim

Synopsys-VCS

Cadence-Xcelium

Rivera-PRO

Description du poste

Location: Bangalore, India
Thales is a global technology leader trusted by governments, institutions, and enterprises to tackle their most demanding challenges. From quantum applications and artificial intelligence to cybersecurity and 6G innovation, our solutions empower critical decisions rooted in human intelligence. Operating at the forefront of aerospace and space, cybersecurity and digital identity, we’re driven by a mission to build a future we can all trust.
Present in India since 1953, Thales is headquartered in Noida and has other operational offices and sites spread across Delhi, Gurugram, Bengaluru and Mumbai, among others. Over 2200 employees are working with Thales and its joint ventures in India. Since the beginning, Thales has been playing an essential role in India’s growth story by sharing its technologies and expertise in Defence, Aerospace and Cyber & Digital sectors. Thales has two engineering competence centres in India - one in Noida focused on Cyber & Digital business, while the one in Bengaluru focuses on hardware, software and systems engineering capabilities for both the civil and defence sectors, serving global needs. The Group has also established an MRO (Maintenance, Repair & Overhaul) facility in Gurugram to provide comprehensive avionics maintenance and repair services to Indian airlines and support the growth of the local aviation industry.

Technical Lead – FPGA Verification (SV-UVM & DO-254)

Position Overview

The Thales India Engineering Competency Center (ECCi) is seeking a Hands-on Technical Lead for FPGA IVV. This is a dual-impact role: you will act as a player and a technical coach to elevate the team's skills while remaining directly involved in the execution of complex verification activities. You will be the driving force behind our transition to SV-UVM and the guarantor of DO-254 excellence.

Qualifications

Experience: 10+ years in FPGA/ASIC Verification.
Industry: Aerospace or Defense background would be an added advantage.
Education: B.Tech/B.E or M.Tech/Masters in Electronics & Communication

Required Skills:

Key Responsibilities:

• Strategic Coaching & Mentorship
• Technical Guidance: Provide daily coaching to the engineering team on SV-UVM best practices and advanced debugging techniques.
• Skill Uplift: Adoption of latest tools, use of AI.
• Best Practices: Establish and maintain high-quality coding standards for SV-UVM and documentation for DO-254.
• Operational Execution
• Environment Development: Directly architect and code critical UVM components (UVM agent, Scoreboards) and complex test scenarios.
• Complex Interfaces Validation: Experience in verification of communication interfaces and bus standards (Example: AXI4, SPI, PCIe, UART, ARINC 818/664 ...)
• Problem Solving: Take the lead on the most challenging technical bottlenecks, from simulation mismatches to physical hardware-software integration issues.
• Certification & Delivery (DO-254)
• End-to-End Ownership: Be accountable for the full verification cycle (DAL A/B), ensuring 100% traceability between requirements and test results.
• Artifact Production: Hands-on drafting and review of critical certification documents.
• Schedule & Risk: Lead technical estimation, planning, and risk mitigation for the IVV scope.

Critical Competencies

Expert SV-UVM (Active Practitioner): Current, hands-on experience in building UVM environments; not just managing them. Communication & Bus Protocols: Deep technical knowledge of AXI4, PCIe, and ARINC standards. Process Assurance: DO-254 (DAL A/B) or ISO 26262 (ASIL-D) or comparable safety standards Mentoring & Pedagogy: Ability to explain complex concepts clearly and upskill a team. Tool Mastery: Advanced user of Siemens-Questasim/Synopsys-VCS/Cadence-Xcelium/Rivera-PRO. Automation: Capable of developing Python/TCL scripts to optimize the verification flow. Project Stewardship: Ability to balance technical execution with planning and reporting.
At Thales, we’re committed to fostering a workplace where respect, trust, collaboration, and passion drive everything we do. Here, you’ll feel empowered to bring your best self, thrive in a supportive culture, and love the work you do. Join us, and be part of a team reimagining technology to create solutions that truly make a difference – for a safer, greener, and more inclusive world.