Subsystem Design Verification Engineer

Arm Limited; Bengaluru; Hybrid; INR 1,500,000 - 2,100,000; Full time

Benefits offered by this job

Accommodations

Hybrid working

Equal opportunities

Job summary

Arm Limited is seeking a Senior Subsystem Design Verification Engineer in Bengaluru to verify complex subsystems and drive verification from planning through closure. You will architect reusable environments, IPs, and automation while collaborating across architecture, design, firmware, emulation, FPGA, and post-silicon teams.

The role focuses on AMBA protocols, memory hierarchies, and high-performance silicon validation, with opportunities to leverage AI-driven tools and scalable verification

Qualifications

• Bachelor's or Master's degree in an engineering discipline.
• 4–9 years of experience in IP or subsystem verification.
• Strong knowledge of Verilog, SystemVerilog, UVM, and modern verification methodologies.

Responsibilities

• Develop and execute verification strategies for subsystem-level designs and IP integration.
• Verify subsystem functionality including interconnects, memory interfaces, peripherals, power management, and software-visible features.
• Validate subsystem functionality under functional, integration, stress, and performance scenarios.
• Own verification deliverables from planning through verification closure while ensuring quality, schedule, and execution commitments are met.
• Architect, develop, and maintain reusable verification environments, verification IPs, methodologies, and automation.
• Develop verification plans, test methodologies, test cases, and coverage closure strategies.
• Drive functional, code, toggle, assertion, and coverage closure.
• Debug RTL, testbench, integration, and system-level issues.
• Collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams.
• Leverage automation, scripting, and AI-assisted workflows to improve verification productivity.
• Contribute to methodology improvements, documentation, and engineering best practices.

Skills

Verilog

SystemVerilog

UVM

AMBA protocols

C/C++

Scripting

RTL debugging

Testbench debugging

Analytical thinking

Collaboration

Education

Bachelor's or Master's degree in an engineering discipline

Job description

Senior Subsystem Design Verification Engineer

About Solutions SoC Engineering

Join the Solutions SoC Engineering organization and help shape the future of silicon. We are building a world-class engineering organization focused on delivering innovative, high-performance, and energy-efficient silicon solutions. As a rapidly growing global team, we bring together expertise across architecture, design, verification, emulation, FPGA, software, and post-silicon validation to deliver first-time-right silicon using advanced methodologies, automation, and AI-driven tools. Our culture is built on technical excellence, ownership, collaboration, and continuous learning.

Role Overview

As a Subsystem Design Verification Engineer, you will verify complex subsystems that form the foundation of next-generation Arm-based platforms. You will develop reusable verification solutions and drive verification from planning through closure.

Key Responsibilities

• Develop and execute verification strategies for subsystem-level designs and IP integration.
• Verify subsystem functionality including interconnects, memory interfaces, peripherals, power management, and software-visible features.
• Validate subsystem functionality under functional, integration, stress, and performance scenarios.
• Own verification deliverables from planning through verification closure while ensuring quality, schedule, and execution commitments are met.
• Architect, develop, and maintain reusable verification environments, verification IPs, methodologies, and automation.
• Develop verification plans, test methodologies, test cases, and coverage closure strategies.
• Drive functional, code, toggle, assertion, and coverage closure.
• Debug RTL, testbench, integration, and system-level issues.
• Collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams.
• Leverage automation, scripting, and AI-assisted workflows to improve verification productivity.
• Contribute to methodology improvements, documentation, and engineering best practices.

Required Skills and Qualifications

• Bachelor's or Master's degree in a relevant engineering discipline.
• 4–9 years of experience in IP or subsystem verification.
• Strong knowledge of Verilog, SystemVerilog, UVM, and modern verification methodologies.
• Understanding of subsystem architecture, integration, AMBA protocols, memory hierarchy, and verification flows.
• Experience with C/C++, scripting, coverage closure, and RTL/testbench debugging.
• Excellent analytical, communication, and collaboration skills.

Desired Skills and Qualifications

• Experience verifying multimedia, security, PCIe, networking, storage, or memory subsystems.
• Knowledge of Arm architecture and AMBA protocols.
• Experience with UPF, formal verification, emulation, FPGA, or gate-level simulation.
• Experience developing reusable verification IPs and automation frameworks.
• AI-assisted verification experience.

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: https://careers.arm.com/en/10x-mindset

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [e-mail]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.