Staff Package Design Engineer

SmartRecruiters, Inc.; Bengaluru; On-site; INR 2,500,000 - 4,500,000; Full time

Job summary

Renesas is seeking a seasoned Package Design Engineer to join our advanced silicon packaging team. You will contribute to high‑performance 2.5D/3D, chiplet-based packages and work with silicon, SI/PI, thermal, and reliability teams to ensure manufacturability and robust product delivery.

The role requires hands‑on CAD layout experience, proficiency with industry tools such as Cadence Allegro APD or Siemens Xpedition, and strong communication skills to drive design reviews and ECO cycles.

Qualifications

• 6+ years hands-on experience in package CAD layout and development.
• Proficiency with 2.5D/3D IC packaging and chiplet-based designs.
• Experience with OSAT manufacturing design rules and interface.

Responsibilities

• Perform package layout design for advanced packages (2.5D/3D IC, FCBGA, SiP).
• Develop and maintain package CAD databases with DFM/DFA requirements.
• Manage end‑to‑end design cycle: schematic, netlist import, footprint assignment, Gerbers.
• Create/modify substrate/RDL layouts, bump maps, escape routing, power/ground structures.
• Collaborate with SI/PI, thermal, reliability, and DFT teams for co-design.
• Ensure designs comply with DRC/LVS and OSAT rules.
• Support ECO cycles, design updates, and version control.

Skills

Package CAD

2.5D/3D packaging

Chiplet-based design

DFM / DFA

SI fundamentals

PI fundamentals

Communication skills

Team collaboration

Tools

Cadence Allegro APD

Siemens Xpedition

Innovator 3D IC

Job description

Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting‑edge technologies including self‑driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas is a global, multi‑billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi‑cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast‑growing data economy‑related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what’s next in electronics.

Job Description

We are looking for a Package Design Engineer to join our advanced silicon packaging design and simulation team and contribute to the design and delivery of high‑performance 2.5D/3D, chiplet‑based, FCBGA, SiP, wire bond and QFP/QFN packages used in industry‑leading products. The role requires strong technical depth in package layout execution, manufacturability, and cross‑domain co‑design with silicon, SI/PI, thermal, and reliability teams.

Key Responsibilities

• Perform package layout design and development for advanced packages including 2.5D/3D IC, FCBGA, SiP, and multi‑chip modules.
• Develop and maintain package CAD databases, ensuring accuracy and adherence to design guidelines, Design for Manufacturing (DFM), and Design for Assembly (DFA) requirements to ensure producibility.
• Manage end‑to‑end design cycle, including schematic creation, netlist import, footprint assignment, and generation of manufacturing outputs (Gerbers, drill data, fabrication/assembly drawings).
• Create and modify substrate/RDL layouts, bump maps, escape routing, and power/ground structures.
• Work closely with SI/PI, thermal, reliability, and DFT teams to support co‑design and optimization and participate in design reviews.
• Ensure designs comply with foundry, OSAT, and manufacturing design rules (DRC, LVS).
• Support ECO cycles, design updates, and version control throughout the project lifecycle.

Minimum Qualifications

• 6+ years of hands‑on experience in package CAD layout and development.
• Strong experience with 2.5D / 3D IC packaging, FCBGA and advanced substrate‑based packages, multi‑die and chiplet‑based designs.
• Proficiency in industry‑standard tools such as: Cadence Allegro Package Designer (APD / SiP), Siemens Xpedition / Innovator 3D IC, or equivalent.
• Experience working with advanced manufacturing design rules and interface with OSATs.
• Good understanding of Signal Integrity (SI) and Power Integrity (PI) fundamentals and High‑Speed Design concepts.
• Strong communication, presentation, and documentation skills with the ability to work effectively in a team environment.

• We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .