Staff Engineer, Systems Design/Architecture Engineering

Analog Devices, Inc.; Hyderabad; On-site; INR 4,500,000 - 7,500,000; Full time

Job summary

Analog Devices, Inc. in Hyderabad seeks a senior SystemC/TLM‑2.0 architect to lead the design and integration of virtual platforms for complex multi‑core SoCs.

You will own modeling strategy, libraries, and IP model lifecycle, coordinating with architecture, hardware, software and verification teams across projects. The ideal candidate has deep experience with ARM/RISC‑V, C/C++, Python, and VP tools, and will mentor engineers while driving early firmware and OS bring‑up and RTL correlation

Qualifications

• Minimum education: B.E./B.Tech or MS/M.Tech/Ph.D. in Electrical, Electronics, or Computer Science.
• Experience: 8–12 years (B.E./B.Tech), 6–10 years (MS/M.Tech), or 4+ years (Ph.D.).
• Expert knowledge of SystemC, TLM-2.0, C and modern C++ (C++14/17).
• Proven track record in architecting full-system SoC virtual platforms used in production software.
• Deep experience with ARM and/or RISC‑V architectures, including software bring‑up.

Responsibilities

• Lead the architecture, development and integration of SystemC/TLM‑2.0 virtual platforms for complex multi‑core SoCs.
• Define and own virtual platform development strategy, standards, and reusable libraries.
• Serve as technical lead for multiple IP models and full-system platforms through lifecycle.
• Drive shift‑left by delivering virtual platforms early for firmware, drivers, OS and apps bring‑up.
• Model complex system behaviors: memory‑mapped transactions, interrupts, DMA, cache coherency.
• Define validation and RTL correlation strategies, co‑simulation and hybrid emulation workflows.
• Integrate virtual platforms with third‑party and open‑source ecosystems (QEMU, Virtualizer, Arm Fast Models, etc.).
• Collaborate with architecture, hardware, software, verification and product teams on VP requirements and milestones.
• Lead post‑silicon validation and debugging, reproducing field issues and providing root cause analysis.

Skills

SystemC/TLM-2.0

C

C++(14/17)

Python

ARM/RISC‑V

Debugging

Leadership

Git/Jenkins/DevOps

Education

B.E./B.Tech or MS/M.Tech/Ph.D. in EE/EC/CS

Tools

Synopsys Virtualizer

Arm Fast Models

QEMU

GreenSocs/QBox

Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Job Responsibilities

• Lead the architecture, development, and integration of SystemC/TLM-2.0 virtual platforms for complex multi-core SoCs, including processors, interconnects, memory subsystems, peripherals, accelerators, and custom IPs.Own individual IP modeling and lifecycle maintenance, ensuring alignment with evolving specifications.
• Define and own the virtual platform modeling strategy, methodology, coding standards, and reusable model libraries across programs.
• Serve as technical lead for multiple IP models and full-system platforms, managing them from specification through release and lifecycle maintenance.
• Drive shift-left enablement by delivering virtual platforms early for firmware, driver, OS, and application bring-up ahead of RTL and silicon availability.
• Architect models of complex system behavior, including memory-mapped transactions, interrupts, DMA, cache coherency, power management, security, and bus protocols
• Define model validation and RTL correlation strategies, including co-simulation and hybrid emulation flows, regression infrastructure, and quality metrics.
• Integrate virtual platforms with third-party and open-source ecosystems such as QEMU, Synopsys Virtualizer, Cadence, Siemens, and Arm Fast Models, as well as debuggers and CI/CD pipelines.
• Work with architecture, hardware, software, verification, and product teams to set VP requirements, milestones, and deliverables aligned with program schedules.
• Lead post-silicon validation and debug support by reproducing field and silicon issues on virtual platforms, performing root‑cause analysis, and feeding results back into models and specifications.
• Mentor and technically guide P1–P3 engineers through design and code reviews and technical growth.
• Represent the modeling team in cross-site technical forums, customer engagements, and industry standards discussions

Position Requirements

• Minimum B.E./B.Tech or MS/M.Tech/Ph.D. in Electrical, Electronics, or Computer Science.
• B.E./B.Tech with 8–12 years, MS/M.Tech with 6–10 years, or Ph.D. with 4+ years of relevant industry experience.
• Expert-level knowledge of SystemC, TLM-2.0, C, and modern C++ (C++14/17), including model performance optimization.
• Proven track record of architecting and delivering full-system SoC virtual platforms used in production software development.
• Deep experience with ARM and/or RISC‑V processor architectures, including ISS/CPU model integration, boot flows, and software bring‑up (bare‑metal, RTOS, Linux).
• Strong understanding of SoC architecture, memory hierarchies, coherency protocols, interconnects, and hardware/software co‑design.
• Experience with commercial or open‑source VP tools and frameworks (e.g., Synopsys Virtualizer, Arm Fast Models, QEMU, GreenSocs/QBox).
• Experience with RTL co‑simulation, hybrid emulation, or model‑to‑RTL correlation methods.
• Proficient in Python and build systems (CMake) for automation, model generation, and validation.
• Hands‑on experience with software development practices and tools such as Agile, DevOps, Git, Jenkins/GitHub Actions, and code‑quality tooling.
• Demonstrated technical leadership, including mentoring engineers, leading cross‑functional initiatives, and influencing architecture decisions.
• Excellent debugging, analytical, and problem‑solving skills across hardware/software boundaries.
• Strong verbal and written communication skills, including presenting technical strategy to stakeholders and management.
• Ability to work across a geographically dispersed team and deal with ambiguity in a fast‑paced environment.Strong debugging, analytical, and cross‑functional collaboration skills.
• Strong problem‑solving skills and ability to work effectively in a fast‑paced, collaborative environment
• Strong verbal and written communication skills
• Self‑motivated team player with the ability to collaborate with team members of varying skillsets
• Ability to work effectively as part of a geographically dispersed team

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days