Staff Engineer, CAD

Micron Technology; Hyderabad; On-site; INR 1,000,000 - 1,500,000; Full time

Job summary

Micron Technology in Hyderabad is seeking a CAD Applications Engineer focused on collaborating with design teams to enhance EDA tools and physical layout design for CMOS integrated circuits.

The ideal candidate has a Bachelor’s degree in Electronics/Electrical/Computer Engineering and 5+ years of relevant experience. Responsibilities include developing PnR flows and customizing EDA tools to improve efficiency across global design teams.

Qualifications

• 5+ years engineering experience with Bachelor's or 4+ years with Master's.
• Strong hands-on experience with place and route tools.
• Excellent UNIX and scripting programming skills.

Responsibilities

• Develop place and route flows for DRAM designs.
• Implement advanced methodologies like hierarchical flow and UPF.
• Customize EDA tools to enhance design team efficiency.

Skills

Industry standard place and route tools (ICC2, Innovus, Primetime)

UNIX programming skills

Scripting (TCL, Perl, Shell, Python)

Problem-solving skills

Communication skills

Education

Bachelor’s degree in Electronics/Electrical/Computer Engineering or Master’s degree

Job description

Job Description

As a CAD Applications Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout and design of CMOS integrated circuits. You will work closely with the Design and Layout teams to increase their productivity and work efficiency.

Responsibilities

• Develop place and route flows at advanced process technology nodes for DRAM designs.
• Implement advanced methodologies such as hierarchical flow, UPF, and process specific flow customizations.
• Work with EDA vendors to deploy latest PnR tool or report/track tool issue to resolution.
• Customize EDA tools and create in-house flows to improve the design team efficiency.
• Work closely with global design teams to support multiple aspects of PnR flow and associated methodologies.
• Define STA constraint.
• Maintain knowledge on corners & various margins (derate, uncertainty, jitter, ID drop etc.) needed in flow.
• Work on critical timing ECO & power closure (ECO), Metal ECO for signoff at SOC level.
• Good control over TCL scripting language, familiarity with Perl and Python preferred.
• In‑depth understanding of the design flow and methodologies.
• Lead flows implementation using AI‑assisted and automated workflows, applying copilot‑based assistants, agentic AI flows, and rule‑aware automation to accelerate placement, routing and optimization.
• Develop and deploy AI‑enabled methodologies for semi‑automated floorplanning, parasitic estimation.

Qualifications

• Bachelor’s degree in Electronics/Electrical/Computer Engineering with 5+ years of experience or master’s degree with 4+ years of experience.
• Strong hands‑on experience in industry standard place and route tools such as ICC2, Innovus, Primetime.
• Excellent UNIX and scripting programming skills (TCL, Perl, Shell, Python).
• Tape‑out experience in latest technology nodes will add advantage.
• Excellent communication and problem‑solving skills.

Equal Employment Opportunity

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.