Sr. Lead IP/RTL Design Engineer

AMD; Bengaluru; On-site; INR 1,500,000 - 2,500,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD is looking for a PMTS Silicon Design Engineer in Bengaluru, Karnataka. This senior role requires expertise in SoC architecture, leading technical discussions on ARM/x86 core interfacing, and managing design and verification processes. Candidates should possess a Bachelor's or Master's degree in Computer Engineering or Electrical Engineering and have experience in power management microarchitecture. AMD offers a collaborative culture focused on innovation and mentoring. Join us to shape the future of AI and computing.

Qualifications

• Expertise in coherent fabric architecture and interfacing with CPU cores such as x86 and ARM.
• Strong ability to mentor and guide a team.
• Experience in analyzing NoC Fabric and System-level Micro-Architectural features.

Responsibilities

• Define Data Fabric/NoC features to meet SoC requirements.
• Lead discussions on ARM/x86 core interfacing.
• Work closely with Design and Verification teams.

Skills

SoC Architecture Expertise

Power Management Microarchitecture

Excellent Communication Skills

Education

Bachelor's or Master's degree in Computer Engineering/Electrical Engineering

Tools

NoC Architecture

ARM/x86 Core Architecture

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

PMTS SILICON DESIGN ENGINEER

The Role

We are seeking a seasoned SoC Architect with expertise or significant interest in System Architecture. You have had significant success driving architecture, product roadmaps and product requirements. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead architecture teams in new directions, network with our world-class, patent-holding think‑tank, and negotiate amongst design teams, marketing, and business unit executives.

The Person

Have expertise in coherent fabric architecture, interfacing with different CPU cores—ex: x86 and/or ARM.

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings. You are highly adept at collaboration among top‑thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

Key Responsibilities

• Define Data Fabric/ NoC features and capabilities required to meet SoC requirements on power, performance, Area targets.
• Close architecture and micro‑architecture requirements, drive technical specifications for data fabric and its IP blocks to meet those requirements, and provide technical direction to execution teams
• Lead discussions on ARM/x86 core interfacing to AMD data fabric IPs, to match SoC requirements.
• Lead design on one or more domains for the data fabric implementation.
• Work with architects and design leads to identify and assess complex technical issues/risks and develop as well as implement solutions to achieve product requirements
• Knowledge sharing and mentoring
• Work closely with Design teams for Area refinement, Timing targets, Verification Test plan reviews, Pre‑Si bug resolution and Performance/Power Verification sign offs
• Work closely with Verification teams to ensure quality component development
• Support Post‑Si teams for functional issues debug/resolution

Preferred Experience

• Excellent foundation in NoC architecture and CPU/GPU coherency.
• Preferred expertise in ARM/other core architecture
• Preferred CHI protocol experience
• Experience analyzing NoC Fabric, CPU, or System‑level Micro‑Architectural features to identify performance bottlenecks within different workloads
• Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture and logic design
• Excellent communication skills. Ability to lead team technically.

Academic Credentials

• Bachelors or Masters degree in computer engineering/ Electrical Engineering

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.