SOC RTL Lead Design Engineer

Advanced Micro Devices; Hyderabad; On-site; INR 54,20,000 - 90,34,000; Full time

Job summary

A global semiconductor company in Hyderabad is looking for a SOC RTL Design Engineer to develop and design custom silicon for various platforms. This role involves collaborating with leading architects to optimize clocking and reset strategies. The ideal candidate will possess a strong background in SoC design and clock distribution. A Bachelor's or Master's degree in Computer or Electrical Engineering is required, along with excellent problem-solving and communication skills.

Benefits

Health insurance

Retirement plan

Paid time off

Qualifications

• Solid understanding of SoC construction, including clock distribution and floorplanning.
• Ability to analyze complex workflows and develop innovative solutions.
• Experience with scripting languages preferred.

Responsibilities

• Analyze clocking, boot, and reset requirements with various AMD teams.
• Define global and local clocking strategies for SOC/IP blocks.
• Collaborate with validation and product engineering teams.

Skills

Problem solving

Communication skills

Data analysis

Scripting (Perl, TCL, Python)

Education

Bachelor's or Master's degree in Computer Engineering/Electrical Engineering

Tools

EDA tools

VLSI design flow

CMOS technology

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

SOC RTL DESIGN ENGINEER

THE ROLE:

As a member of the Computing & Graphics (CG) SoC Architecture team, you will develop and design custom silicon for client, discrete graphics, handheld gaming, gaming consoles, and related platforms. In this role, you will work with the lead SoC architect to define customer‑specific architectures and contribute to product specifications, micro‑architecture specifications, performance, and power trade‑offs. The role will work from early concept development through the development phases to final production.

THE PERSON:

In this role, you will collaborate with a network of expert architects and designers around the world where collaboration and communication skills are critical to the success of this role, and excellent organization skills are essential. You will approach sophisticated problems with a firm methodology and problem‑solving technique and conduct experiments and analysis to formulate recommendations and next steps for other colleagues and SOC and IP design teams located in across multiple time zones and geographies. You will formally present your findings to co‑workers, teams, and customer engineering teams.

KEY RESPONSIBILITIES:

• Analyze clocking, boot, and reset requirements with various AMD Engineering and IP teams to drive end‑to‑end optimizations.
• Define global and local clocking strategies for SOC/IP blocks including low power clocking strategies.
• Identify clock macro requirements and determine usage/placement for optimal power, performance, and area.
• Collaborate with technology, silicon validation, and product engineering teams to achieve robust clocking and reset strategy for both functional operating mode and manufacturing test mode.
• Partner with AMD engineering and IP teams to drive clocking, boot, and reset design integration, implementation, and optimization, supported by comprehensive end‑to‑end flow documentation.

PREFERRED EXPERIENCE:

• Solid understanding of SoC construction including clock distribution, boot/reset sequencing, and floorplanning.
• Understanding of SoC clocking requirements and associated design tradeoffs.
• Understanding of clock macros (e.g., PLL, dividers, etc.) and their fundamentals.
• Familiarity with boot and reset flows.
• Skills in scripting, data analysis, experience with EDA tools, VLSI design flow and CMOS technology.
• Strong problem solving, organizational and communication skills, and ability to work in a dynamic and diverse environment.
• Detailed thinking skills. Ability deal with novel problems from different perspectives and from different levels of abstraction.
• Ability to analyze and understand sophisticated workflows and processes, and develop innovative ways in streamlining and automating.
• Proficiency in scripting languages (Perl, TCL, Python) is highly preferred.

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering.

#LI-PM2

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.