SoC Architect

NXP Semiconductors; Maharashtra; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

NXP Semiconductors India is seeking a senior SOC Architect to define and drive the architecture for next‑generation WiFi/SoC platforms. You will lead multi‑core design decisions, specify interfaces, and collaborate across hardware, firmware and IP teams to deliver secure and power‑efficient solutions.

The role demands deep experience in RTL, microarchitecture, physical design, and low‑power optimization, with a focus on scalable compute, memory hierarchy, and interconnects to support advanced

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 12+ years of Industry experience.
• Proven experience in SoC architecture, microarchitecture, RTL design, and/or physical design.
• Strong understanding of microprocessor and microcontroller architectures, including CPU cores, interconnects, memory management, bus protocols, and peripheral integration.
• Experience in low-power design and performance optimization.
• Familiarity with Ethernet, USB, SPI, and I3C protocols.
• Strong collaboration skills across silicon, hardware, and software teams.

Responsibilities

• Architecture Definition: Lead the definition and evolution of WIFI SoC architectures aligned with product strategy, market trends, and industry standards.
• Microarchitecture & Compute: Design scalable and efficient multi-core compute architectures optimizing for TCMs, SRAM hierarchy, DMA, interconnect bandwidth.
• Security Architecture: Define and integrate secure boot, root-of-trust, isolation, and cryptographic acceleration. Ensure architectures support functional safety and lifecycle requirements.
• SoC Integration: Collaborate with hardware, firmware, and IP teams to ensure seamless integration of processing, memory, power management, peripherals, and interconnect subsystems. Good understanding of Analog IPs (ADC, DAC, PLL, SERDES etc.) will be required.
• Performance & Power Optimization: Lead architectural strategies to optimize performance per watt. Balance frequency, voltage, memory, and power states to meet RT and MCX power envelopes. Support early performance and power estimation to reduce program risk.
• Technical Leadership & Documentation: Develop architecture specifications, best practices, and technical documentation to guide development teams.

Skills

SoC architecture

RTL design

Physical design

CPU architectures

Low-power design

Performance optimization

Ethernet

USB

SPI

I3C

Cross-functional collaboration

ARM Cortex‑M familiarity

Education

Bachelor's or Master's in EE/CE with 12+ years experience

Job description

Summary: The SOC Architect designs a complete and complex framework, system or product. Defines processes for technical platforms, system specifications, input/output and working parameters for hardware and/or software compatibility. Conceives system interfaces and business application prototypes. Identifies, analyzes and resolves system design weaknesses. Influences the shaping of future products by contributing to the framework (architecture) used across multiple products or systems. Provides multi-layered technical expertise for next generation initiatives.

Key Responsibilities

• Architecture Definition: Lead the definition and evolution of WIFI SoC architectures aligned with product strategy, market trends, and industry standards.
• Microarchitecture & Compute: Design scalable and efficient multi-core compute architectures optimizing for TCMs, SRAM hierarchy, DMA, interconnect bandwidth.
• Security Architecture: Define and integrate secure boot, root-of-trust, isolation, and cryptographic acceleration. Ensure architectures support functional safety and lifecycle requirements.
• SoC Integration: Collaborate with hardware, firmware, and IP teams to ensure seamless integration of processing, memory, power management, peripherals, and interconnect subsystems. Good understanding of Analog IPs (ADC, DAC, PLL, SERDES etc.) will be required.
• Performance & Power Optimization: Lead architectural strategies to optimize performance per watt. Balance frequency, voltage, memory, and power states to meet RT and MCX power envelopes. Support early performance and power estimation to reduce program risk.
• Technical Leadership & Documentation: Develop architecture specifications, best practices, and technical documentation to guide development teams.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 12+ years of Industry experience.
• Proven experience in SoC architecture, microarchitecture, RTL design, and/or physical design.
• Strong understanding of microprocessor and microcontroller architectures, including CPU cores, interconnects, memory management, bus protocols, and peripheral integration.
• Experience in low-power design and performance optimization.
• Familiarity with Ethernet, USB, SPI, and I3C protocols.
• Strong collaboration skills across silicon, hardware, and software teams.

Preferred Qualifications

• Experience with ARM Cortex-M architectures
• Background in power and performance modeling, HW/SW co-design, and debugging
• Knowledge of functional safety and security standards
• Familiarity with Wi-Fi integration, networking protocols, and secure wireless communication

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