Senior/Staff Engineer : Post Silicon- Bring Up

Cerebras; Bengaluru; On-site; INR 16,698,473 - 26,240,458; Full time

Job summary

Cerebras is seeking an experienced engineer for Wafer Scale Engine optimizations in Bengaluru, India. You will develop/debug flows, improve performance of AI systems, and collaborate across multiple engineering domains. Ideal candidates will possess 7-10 years of industry experience and proficiency in languages like Python, Verilog, and C.

The role requires excellent debugging and problem-solving skills, with a focus on production and workflow refinement. Competitive salary between $175,000 and $275,000 annually based on qualifications.

Qualifications

• 7-10+ years of industry experience.
• 3-5 years of experience in Pre-silicon & Post Silicon ASIC hardware.
• Good understanding of computer architecture and networking.

Responsibilities

• Develop and debug flows for Wafer Scale Engines production processes.
• Refine AI Systems considering design constraints for performance.
• Enhance infrastructure enabling real-world workload testing.

Skills

Python

Verilog

System Verilog

C

Debugging

Problem-solving

Automation with pytest

Education

BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS

Tools

CI/CD tools

Git

GitHub

Jenkins

Job description

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry‑leading training and inference speeds; over 10 times faster than GPU‑based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real‑time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprises, and cutting‑edge AI‑native startups. OpenAI recently announced a multi‑year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high‑speed inference.

The Role

In this exciting role, you will be responsible for bring up and optimizations of Cerebras’s Wafer Scale Engine (WSE). Suitable candidate will have experience delivering end to end solutions working closely with teams across chip design, system performance, software development and productization.

Responsibilities

• On Wafer Scale Engines, develop and debug flows that embed well tested and deployable optimizations in production processes to reduce time and costs
• Work on refining AI Systems across H/W-S/W design constraints such as di/dt, V‑F characterization space, current and temperature limits in relation to optimizations for performance.
• Develop/Enhance infrastructure to enable silicon for real world workload testing
• Develop self-checking metrics, as well as instrumentation for debug and coverage
• Work with the silicon architects/designers, performance engineers and software engineers to enhance performance of Wafer Scale Engines.
• Work across domains such as, Software, Design, Verification, Emulation & Validation to refine and optimize performance and process.
• Work with CI/CD tools, git repositories, github, git actions/Jenkins, merge and release flows to streamline test and release.

Skills & Qualifications

• BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS or equivalent work experience
• 7-10+ years of industry experience
• 3-5 years of experience in Pre‑silicon & Post Silicon ASIC hardware
• Good understanding of computer architecture and networking
• Excellent Coding in languages such as Python/Verilog/System Verilog and C
• Proficient in hardware/software codesign and layered architectures.
• Excellent debugging, analytical, and problem‑solving skills
• Proficient in large scale testing and automation using pytest and python
• Good presentation skills to refine diverse information and put forth optimization strategies and results.
• Good interpersonal skills, ability & desire to work as a standout colleague
• Proven track record of working cross‑functionally learning fast and driving issues to closure

Preferred

• Previous work in AI‑ML with 100+ CPU core & communication fabric‑based design.
• Familiarity with in‑line testing and diagnostics using CPU memory and execution with self‑checking.
• Knowledge of chip defect profiles and mitigation strategies across the hardware and software stack
• Familiarity in creating test and s/w infrastructure at large scale
• Working across global time zones

Location

Sunnyvale, California.

Bangalore, India

Toronto, Canada

The base salary range for this position is $175,000 to $275,000 annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

Equal Employment Opportunity

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.

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