Senior Staff Engineer - Analog/Mixed Signal Design

Renesaselectronics; Bengaluru; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

Renesas Electronics in Bengaluru seeks a Senior Staff Engineer for Analog/Mixed-Signal Design with 10+ years in transistor-level analog IC design. You will architect and deliver complex IPs, lead cross-functional efforts, and mentor engineers across the product lifecycle.

The role focuses on power management IPs and multi-phase controllers within the Power Business Unit, offering impact across AI infrastructure and hyperscale platforms.

Qualifications

• 10+ years of hands-on analog and mixed-signal IC design experience.
• Ownership of complex transistor-level analog IP from spec to silicon validation.
• Strong fundamentals in analog circuit design and device physics.
• Experience across full IC development lifecycle and cross‑functional collaboration.

Responsibilities

• Architect, design, own, and deliver high-performance analog and mixed-signal IPs.
• Lead analog IP development through architecture to silicon validation and production support.
• Collaborate with layout engineers for optimal analog performance and reliability.
• Develop and optimize simulation methodologies for pre- and post-layout verification.
• Mentor junior engineers and drive a culture of technical excellence.

Skills

Analog IP design

Transistor-level design

Mixed-signal design

Circuit optimization

Technical leadership

Mentoring

Cross-functional collaboration

Education

Bachelor’s or Master’s degree in Electrical Engineering

Tools

SPICE simulations

EDA tools

Monte Carlo analysis

Job description

We are seeking an experienced Senior Staff Engineer - Analog/Mixed-Signal Design with 10+ years of expertise in transistor-level analog IC design and a strong foundation in analog circuit design fundamentals. The ideal candidate has a proven track record of architecting, designing, integrating, and delivering complex analog IPs and mixed-signal subsystems from concept through production. Experience developing power management ICs is a plus.

As part of Renesas' $2.6B Power Business Unit, you will help develop next-generation analog and mixed-signal solutions for multi-phase controllers and power management products that enable AI infrastructure and hyperscale computing platforms.

Key Responsibilities

• Architect, design, own, and deliver high-performance analog and mixed-signal IPs, including: Source/sink LDOsPositive and negative charge pumpsRelaxation and other oscillator architecturesTemperature sensorsCurrent-sense circuitsSAR ADCsProtection circuits (UVLO, OVLO, OCP, thermal protection, etc.)Core analog building blocks, including bandgap references, operational amplifiers, comparators, analog buffers, V-to-I converters, and high-speed level shifters
• Drive innovative circuit architectures and design optimizations to meet challenging performance, power, area, yield, and reliability targets.
• Lead analog IP development through the complete product lifecycle-from architecture and transistor-level implementation through silicon validation, production qualification, and manufacturing support.
• Collaborate closely with layout engineers from floorplanning through chip-level integration, ensuring optimal analog layout, parasitic-aware design, and performance trade-offs.
• Develop and optimize simulation methodologies across pre- and post-layout verification, balancing simulation accuracy, convergence, runtime, and debugging efficiency.
• Establish and drive robust analog design methodologies, review processes, and quality checklists to maximize first-pass silicon success.
• Define and review chip-level ESD, latch-up, and I/O protection strategies to ensure product robustness and reliability.
• Mentor junior engineers and foster a culture of technical excellence across the team.
• Lead or manage a small team of engineers, driving execution, mitigating technical risks, and delivering high-quality silicon on schedule.

Minimum Qualifications

• Bachelor's or Master's degree in Electrical Engineering or a related discipline.
• 10+ years of hands-on experience in analog and mixed-signal IC design.
• Demonstrated ownership of complex transistor-level analog IP from specification through silicon validation.
• Strong understanding of: Analog circuit design fundamentalsSemiconductor device physics and transistor-level designProcess corners, Monte Carlo analysis, mismatch, and noiseExtraction, post‑layout simulation, and parasitic optimizationAnalog layout techniques and layout‑dependent effects (LDE)ESD, latch‑up, and chip‑level reliability considerations
• Proven experience across the complete IC development lifecycle, including architecture, design, verification, silicon bring‑up, debugging, qualification, and production support.
• Strong technical leadership, mentoring, communication, and cross‑functional collaboration skills, with a passion for building high‑performing engineering teams.

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .