Senior Physical Design Engineer - Bengaluru, Multiple Vacancies

EngineersOfAI; Bengaluru; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Graphcore Bengaluru is hiring Silicon Physical Design Engineers to join a fast-moving AI hardware team. The role focuses on delivering sign-off quality final chip layouts (GDSII) for next‑generation AI superchips, collaborating with RTL, verification and DFT teams.

You will influence flows, tools, and methodologies while owning design solutions in a cutting-edge node environment. The successful candidate will contribute technically, communicate effectively, and adapt quickly in a collaborative

Qualifications

• Experience in silicon physical design for AI chip projects.
• Ability to work with leading-edge process technology and sign-off quality.
• Strong communication and ownership of designs.

Responsibilities

• Contribute to development of Graphcore's next generation AI superchips focusing on robust, high-performance, power-efficient designs.
• Use state-of-the-art EDA tools and in-house Graphcore flows to deliver sign-off-quality designs.
• Analyze and debug complex engineering problems and optimize in-house flows and methodologies.

Skills

RTL design

EDA tools

ASIC design

DFT

Tools

GDSII

EDA flows

in-house APIs

Job description

Silicon Physical Design Engineer

Multiple roles across different levels

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing.

The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packagingand product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g.TSMC).

We are looking to hire high-quality silicon physical design engineers to join our team.The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge design s at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to take ownership of their designs and problem solutions. You will be part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure.

Responsibilities and Duties

• Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, focusing on achieving robust, high-performance and power-efficient designs in leading-edge process technologies while meeting ambitious development schedules
• Contributions are expected to spanmultiple areas and involve:
• using state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs that are of sign-offquality
• enhancing existing flows and in-house tools/APIs to support new features and/or methodologies
• analysis and/or debugging of complex engineering problems leading to workable solutions
• developing an understanding of emerging technical issues and applying that knowledge to optimise in-houseflows and metho