Senior Memory layout Engineer

SmartSoC Solutions Pvt Ltd; Bengaluru Urban; On-site; INR 1,200,000 - 2,200,000; Full time

Job summary

SmartSoC Solutions Pvt Ltd in Bengaluru seeks an experienced Layout Engineer to contribute to advanced FinFET layout tasks. The role emphasizes Cadence tool proficiency and deep layout knowledge across leading process nodes. This is positioned as an entry-level opportunity in the semiconductor field with full-time employment.

The candidate should have 4+ years of relevant experience and a strong engineering background, enabling effective collaboration within a design team.

Qualifications

• Minimum 4+ years of experience with a Bachelor's degree in Engineering studies or Master's degree, strong layout knowledge.
• Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules).
• Strong layout knowledge in advanced submicron FinFET processes, including TSMC 5nm, 3nm, 2nm, A14 or Samsung lower FinFET nodes.

Skills

Layout design

Education

Bachelor's or Master's in Engineering

Tools

Virtuoso Layout

Layout XL

Cadence Schematic Capture

Calibre

Hercules

Job description

• Minimum 4+ years of experience with a Bachelor's degree in Engineering studies or Master's degree, strong layout knowledge.


• Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules).


• Strong layout knowledge in advanced submicron FinFET processes, including TSMC 5nm, 3nm, 2nm, A14 or Samsung lower FinFET nodes.

Seniority level

Entry level

Employment type

Full-time

Job function

Semiconductor Manufacturing

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Principal Layout Design & Integration Engineer