Senior Manager - Design Engineering

Microchip Technology Inc.

Bengaluru

On-site

INR 4,000,000 - 7,000,000

Full time

14 days+

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Job summary

Microchip Technology Inc. in Bengaluru, India seeks a Senior Design Manager for its Communications Business Unit to lead the silicon design program and build a high-performing team.

You will guide RTL design and verification across the full cycle, mentor 20+ engineers, coordinate with PM, Marketing and Validation, and help shape the technical direction for advanced process nodes.

Qualifications

  • 14+ years of experience in silicon design and verification.
  • Strong leadership with coaching and mentoring temperament.
  • Deep expertise in RTL design, verification, and low-power methodologies.
  • Experience with DFT, scan testing, and STA flows.
  • Proven track record delivering complex tape-outs in high-performance silicon.
  • Hands-on with RTL design tools and EDA environments.

Responsibilities

  • Lead end-to-end RTL design execution from concept to silicon bring-up.
  • Collaborate with PM, Marketing, Software, and Validation teams to resolve issues.
  • Build and mentor a 20+ person engineering organization in India.
  • Drive methodology innovations and automation to improve silicon quality.

Skills

RTL design
Verification
Low-power design
DFT
Synthesis
Timing analysis
Leadership
Cross-functional collaboration

Education

Bachelor's degree in EE or higher

Tools

Synopsys tools
Cadence tools
ASIC EDA tools

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await!

Job Description

Microchip’s Communications Business Unit (CBU) develops high-performance networking, connectivity, and edge compute semiconductor solutions that power communications infrastructure, data centers, automotive systems, aerospace and defense platforms, and industrial applications. Our global team works across the full product lifecycle to deliver innovative products that enable the world’s most demanding connected systems. The CBU Product Development team is engaged through the full device R&D cycle from concept, design and implementation stages. Once a prototype is available, we support embedded software development and system validation lab testing through to mass-market production release. We are an experienced chip team working with the latest semiconductor development tools and methodologies in advanced process technologies to develop state-of-the-art network devices. We are seeking a senior design manager in India for a rare opportunity to help build something foundational. We are looking for a recognized hands-on technical leader who can shape architecture, guide complex semiconductor development programs, solve challenging engineering problems, and make critical technical decisions, while being able to attract exceptional talent, mentor engineers, and build a high-performing organization from the ground up. This is a unique opportunity to help establish and scale CBU’s Silicon Design Center in India while defining both the technical direction and engineering culture of the organization. As a Senior Manager in the CBU Product Development team you will be responsible for the technical leadership of communication semiconductor devices or subsystems. You will collaborate with Project Management, Marketing and Application Engineers, Chip Architects, Subsystem Leads and Verification Teams to deliver complex designs in a friendly, challenging and professional environment. As an engineering manager, you will have leadership responsibilities that may include direct reports and/or contractors. You will a have the opportunity to enhance and grow CBU’s technical capabilities through mentorship, coaching and recruitment.

  • Strategic Leadership and Talent & Team Management: Lead and develop a team of 20+ engineers; Manage resource allocation, performance reviews, and technical career growth.
  • Technical Execution: Drive end-to-end RTL design execution, from concept through to architecture, coding, verification, synthesis, sign-off, and silicon bring-up support; Serving as a technical authority for digital design, ensuring high standards in quality, performance, power, and area; Resolving complex, cross-domain design and EDA tool challenges impacting schedule or silicon quality.
  • Methodology Innovation: Drive the adoption of advanced techniques through different phases of silicon development: from design, verification, to validation and release to production; Continuously improve efficiency through automation, scripting, and the integration of AI-driven tools.
  • Cross-Functional Collaboration: Partner closely with Physical Design, Software, Product Engineering, Validation and other teams/vendors to resolve complex integration issues and bottlenecks.
Requirements/Qualifications
  • Education: Degree in EE (Bachelor’s or higher)
  • Work experience: 14+ years of experience is preferred
  • Proven leadership skills with strong coaching and mentoring temperament
  • Ability to think both strategically and tactically
  • Deep understanding of all phases of silicon development with expertise in RTL design and verification.
  • Strong understanding of functional verification flows and environments.
  • Proven success delivering multiple complex tape-outs in high-performance silicon.
  • Deep hands‑on experience with Lint, CDC, formal verification, logic synthesis, and static timing analysis along with physical design interactions.
  • Solid experience with low-power design methodologies and flows.
  • Working knowledge of DFT, including scan, testability considerations, and DFT sign-off interactions.
  • Experience with Synopsys or Cadence tools for synthesis, verification or STA (an asset)
  • Experience with 28nm and smaller silicon process technologies (an asset)
  • Hands‑on experience with ASIC EDA tools/environment is an asset.

Travel Time: 0% - 25%

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