About the Position
As a Staff firmware verification engineer, you will be part of the firmware verification team that designs and develops white box and grey box tests in Python to verify SSD firmware designs for each firmware feature. This position focuses on verification and validation of SSD firmware features. You will be working closely with product architects and firmware engineers to create a comprehensive firmware verification test for SSD features. In this role, you will contribute to test strategy, test development, integrate the tests using various development platforms, deploy them on the firmware verification lab for regression runs, and perform failure analysis. The role focuses on defining and executing robust firmware verification strategies for PCIe, MMIO, DMA, and custom host–device protocols across both pre‑silicon and post‑silicon environments.
Responsibilities
- Collaborate closely with firmware engineers & architects on product architecture and designs to define the comprehensive verification plan to validate each SSD feature
- Design, develop and integrate the white box and gray box tests on SSD products in roadmap
- Conduct test plan reviews and code reviews to ensure the tests are scalable and meet requirements
- Participate in driving failure analysis and collaborate with integration/execution engineers for test deployment
- Validate designs against PCI Express Base Specification (up to Gen5/Gen6), ensuring compliance with electrical, logical, and transaction-layer requirements
- Define and own firmware validation strategy for PCIe front‑end subsystems, including MMIO address spaces, BARs, resets, interrupts, and error handling
- Define, plan, and execute system‑level validation strategies for PCIe front‑end (PHY + controller) IP and SoC‑level integration
- Integrate tests into scalable automation frameworks supporting simulation, emulation, and silicon validation
- Debug firmware issues, perform front‑end error injection, and expose design or integration defects
- Validate PCIe compliance, MMIO access integrity, and robustness of fault detection and recovery mechanisms
- Review and verify firmware trace logs and debug telemetry for correctness and completeness
- Drive validation readiness across pre‑silicon and post‑silicon platforms, ensuring alignment of firmware specs, drivers, and test collateral
- Interface with cross‑functional stakeholders to ensure validation coverage meets product and customer requirements
- Drive compliance and interoperability testing with various endpoint/root‑complex devices, switches, and add‑in cards
Required Qualifications & Skills
- BE/B.Tech/ME/M.Tech degree in CSE/ ECE/ EEE/ IS or related field
- In‑depth knowledge of PCIe Gen3/Gen4/Gen5 (Gen6 preferred) LTSSM, TLP/DLLP, flow control, ordering rules, error handling, power management
- Proficiency with protocol analyzers/exercisers (Teledyne LeCroy, Keysight) etc.
- Experience with high‑performance storage, networking, or compute SoCs
- Strong expertise in PCIe protocol, MMIO, BARs, DMA, and ASIC front‑end architecture
- Strong scripting skills in Python based scripting APIs
- Hands‑on experience with error injection, fault modeling, and silicon debug tools
- Familiarity with pre‑silicon (simulation/emulation) and post‑silicon lab validation flows
- Solid understanding of firmware–hardware interaction and system‑level debugging
- Demonstrated leadership in test strategy definition, technical reviews, and mentoring
- Strong problem‑solving skills and ability to drive issues to closure under schedule pressure
- Excellent communication skills with the ability to collaborate across teams and influence technical decisions
- Proficiency in scripting and automation using Python, C/C++, or Bash
- Minimum 6 – 8 years of related experience in firmware verification or system level testing along with Gen5/Gen6 PCI‑SIG protocol testing
- Knowledge of Git, CI & source code management flow and agile development practices
Soft Skills
- Strong problem‑solving skills with a focus on root cause analysis
- Collaborative and proactive communication style
- Attention to detail and quality assurance mindset
- Ability to work effectively in a global, cross‑functional team
Accommodations
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