Senior Engineer – RV (EM/IR)

TylSemi, Inc.; Bengaluru; Hybrid; INR 2,500,000 - 4,000,000; Full time

Job summary

TYLsemi, Inc. in Bengaluru seeks a Senior Engineer – EM/IR to join the Physical Design and Signoff team.

You will perform power integrity analysis, IR drop and electromigration checks for advanced-node SoC designs, collaborating with Physical Design, Power, and Package teams to ensure robust PDN implementation and reliable signoff. The ideal candidate has 5+ years in EM/IR, IR drop analysis, and PD signoff, with hands-on experience in Cadence Voltus or Ansys RedHawk, and scripting in Tcl,

Qualifications

• 5+ years in EM/IR analysis, power integrity, or Physical Design signoff roles.
• Strong understanding of static/dynamic IR drop analysis and electromigration concepts.
• Experience with Cadence Voltus, Ansys RedHawk, or equivalent tools.
• Good understanding of PD flow including floorplanning, placement, CTS, routing, extraction.

Responsibilities

• Perform block-level and full-chip IR drop and EM analysis for advanced-node designs.
• Analyze and debug IR violations to achieve power integrity signoff.
• Collaborate with Physical Design, Floorplanning, CTS, Routing, and Package teams to optimize PDN.
• Develop and improve IR/EM automation flows and signoff methodologies.
• Support tapeout activities and ensure clean IR/EM signoff delivery.

Skills

EM/IR analysis

Power integrity

IR drop analysis

Electromigration

Cadence Voltus

Ansys RedHawk

Tcl scripting

Python scripting

Shell scripting

Floorplanning

Placement

CTS

Routing

Extraction

Education

Bachelor’s or Master’s in Electronics/Electrical Engineering or VLSI

Tools

Cadence Voltus

Ansys RedHawk

Job description

About this position

About TYLsemi, Inc.

The Opportunity

About TYLsemi, Inc.

The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem:how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

That's what we solve. TYLsemi builds thechiplet infrastructure IP— the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

This isn't a nice-to-have. It's the critical path.

Why NowThe Market Window

The semiconductor industry is going through its biggest architectural shift in 40 years:

Moore's Law is dead.2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.Custom silicon is now mainstream.Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.IO and power are the bottleneck.Solve hard problems and provide something which is a category in itself.Translation:We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.

Culture & Team: How We Work

No Politics, No Bureaucracy

There are no layers, no approval chains, no corporate theater.

If you have an idea, we test it. If it works, we ship it.

No endless meetings, no PowerPoint presentations to convince middle management.

Remote-Friendly, Global Team

US team: Bay Area preferred, but we hire the best people regardless of location

India team: Building a world-class design center in Bangalore

Move Fast, Ship Real Products

We're not a research project. We have paying customers, committed capital, and aggressive timelines.

This is a company, not a lifestyle business. We're building to win.

What We Value

• Ownership mindset.You're not here to execute someone else's roadmap. You're here to define it.
• Bias for action.We move fast. Analysis paralysis doesn't fly here.
• Deep technical expertise.This is hard engineering. We need people who've shipped real silicon and debugged real hardware.
• Low ego, high standards.We don't care about titles or politics. We care about results.

The Ask

If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.

We're asking you to walk away from that and bet on us.

Here's why you should:

• The market is real.AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.
• The team has done this before.We've built and exited semiconductor companies at scale. This isn't our first rodeo.
• The traction is de-risked.We have LOIs, strategic investors, and a clear path to revenue.
• The work is consequential.You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.

This is the bet.Join us and build something that matters.

Or stay comfortable. No judgment.

But if you're the kind of person who wants to take the shot, we'd love to talk.

READY TO JOIN?

Role Overview

We are looking for a highly motivatedSenior Engineer –EM/IRto join the Physical Design and Signoff team. In this role, you willbe responsible forperforming power integrity analysis including IR drop and electromigration (EM) checks for advanced-node SoC designs. You will work closely with Physical Design, Power, and Package teams to ensure robust power delivery network implementation and reliable signoff closure. The ideal candidate should have strong fundamentals in power integrity analysis, signoff methodologies, and advanced-node implementation challenges.

WhatYou’llDo

• Perform block-level and full-chip IR drop and electromigration (EM) analysis for advanced-node designs
• Analyze and debug static and dynamic IR violations to achieve power integrity signoff closure
• Collaborate with Physical Design,Floorplanning, CTS, Routing, and Package teams to optimize power delivery networks
• Run and interpret power integrity analysis across multiple operating conditions and scenarios
• Support EM analysis by evaluating current density, reliability limits, and thermal impacts
• Develop and improve IR/EM automation flows, scripts, and signoff methodologies
• Supporttapeoutactivities and ensure clean IR/EM signoff delivery

WhatWe’reLooking For

• 5+ years of experience inEM/IRanalysis, power integrity, or Physical Design signoff roles
• Strong understanding of static and dynamic IR drop analysis, electromigration concepts, and power grid optimization
• Hands-on experience with industry-standard tools such as CadenceVoltus, Ansys RedHawk, or equivalent
• Good understanding of Physical Design flow includingfloorplanning, placement, CTS, routing, and extraction
• ProficiencyinTcl, Perl, Python, or Shell scripting for automation and flow enhancement
• Bachelor’s orMaster’sdegree in Electronics, Electrical Engineering, or VLSI-related discipline

Good to Have

• Experience with advanced technology nodes such as 7nm, 5nm, or below
• Exposure to package-aware analysis, thermal analysis, and low-power methodologies
• Understanding of power-aware signoff methodologies and reliability verification flows

Success in This Role Looks Like

• Achieving clean IR/EM signoff with robust power integrity across all operating conditions
• Efficient identification and resolution of power integrity and reliability issues
• Improved productivity through automation andmethodologyenhancements
• Successful collaboration across cross-functional teams leading totimelytapeoutexecution

Location

Hybrid / On-site – Bengaluru/ Remote - India

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