QuEST Global Off Campus Hiring 2026 | Recruitment for Freshers as Trainee Engineers

Freshers Recruitment; Bengaluru; On-site; INR 350,000 - 550,000; Full time

Job summary

QuEST Global invites fresh engineering graduates to join as DV Trainee Engineers in Bangalore. The role focuses on verification and testing, including testbench development, debugging, and automation, with opportunities to work on digital verification and design verification projects in the semiconductor domain.

Applicants should hold a B.E./B.Tech./M.E./M.Tech. in ECE, CSE, or EEE and have at least one relevant academic project.

Qualifications

• Degree in Electronics and Communication Engineering (ECE), Computer Science Engineering (CSE), or Electrical and Electronics Engineering (EEE).
• Strong understanding of digital design fundamentals.
• Knowledge of SystemVerilog (SV) and UVM (Universal Verification Methodology) coding.
• At least one academic project related to the field.

Responsibilities

• Developing and maintaining essential testbench components such as drivers, monitors, and scoreboards to support design verification.
• Test Execution: Running simulations and test cases using industry-standard EDA tools to identify potential design issues.
• Debugging and Analysis: Investigating failed test cases, analyzing waveforms, and collaborating with RTL design team to resolve issues.
• Test Planning and Coverage: Understanding design specifications, executing feature-specific test plans, and monitoring functional and code coverage.

Skills

Digital design fundamentals

SystemVerilog

UVM

Education

B.E./B.Tech./M.E./M.Tech.

Job description

QuEST Global Off Campus Hiring 2026 | Recruitment for Freshers as Trainee Engineers

QuEST Global Off Campus Hiring 2026 : QuEST Global has announced an exciting opportunity for fresh engineering graduates to join the company as DV Trainee Engineers. Candidates who have completed or are pursuing B.E., B.Tech., M.E., or M.Tech. degrees are eligible to apply. The position is based in Bangalore, making it a great opportunity for aspiring engineers looking to start their careers in the core engineering domain.

Position DV Trainee Engineer

Category Core Engineering Jobs

Qualification B.E./B.Tech./M.E./M.Tech.

Experience Freshers

Location Bangalore

Eligibility Criteria

To be considered for this role, candidates should have:

• A degree in Electronics and Communication Engineering (ECE), Computer Science Engineering (CSE), or Electrical and Electronics Engineering (EEE).
• Strong understanding of digital design fundamentals.
• Knowledge of SystemVerilog (SV) and UVM (Universal Verification Methodology) coding.
• At least one academic project related to the field.

Key Responsibilities

As a DV Trainee Engineer, you will be involved in various verification and testing activities, including:

• Developing and maintaining essential testbench components such as drivers, monitors, and scoreboards to support design verification.
• Test Execution
  • Running simulations and test cases using industry-standard EDA tools to identify potential design issues at an early stage.
• Debugging and Analysis
  • Investigating failed test cases, analyzing waveforms, identifying the root cause of bugs, and collaborating with the RTL design team to resolve issues.
• Test Planning and Coverage
  • Understanding design specifications, executing feature-specific test plans, and monitoring both functional and code coverage to ensure verification goals are achieve.
• Automation Support
  • Creating basic automation scripts using languages such as Python or Tcl to streamline simulation and regression testing processes.

QuEST Global’s DV Trainee Engineer role offers an excellent opportunity for fresh graduates to begin their careers in the semiconductor and verification domain. With exposure to digital verification, testbench development, debugging, and automation, candidates can gain valuable industry experience while working on real-world engineering projects. If you have a strong foundation in digital electronics and verification concepts, this position could be a great stepping stone toward a successful career in VLSI and design verification.

FAQs for QuEST Global Off Campus Drive 2026

1. Who can apply for the QuEST Global Off Campus Drive 2026?

Candidates with B.E., B.Tech., M.E., or M.Tech. degrees in ECE, CSE, or EEE are eligible to apply for the DV Trainee Engineer position. Fresh graduates are encourage to apply.

2. Is prior work experience require for this role?

No, this opportunity is open to freshers. However, candidates should have a good understanding of digital design fundamentals and basic knowledge of SystemVerilog (SV) and UVM.

3. What is the job location for the DV Trainee Engineer role?

The selected candidates will be posted in Bangalore, one of India’s leading technology and engineering hubs.

4. What skills are preferre for the QuEST Global Trainee Engineer position?

Applicants should have strong digital electronics fundamentals, knowledge of SV and UVM coding, debugging skills, and experience working on at least one academic project related to the field.