Product Engineer-SiC

Navitas Semiconductor Usa; Pune District; On-site; INR 1,500,000 - 1,900,000; Full time

Job summary

Navitas Semiconductor Usa in Pune is seeking an experienced engineer to own change control for released products across fab, test, and assembly. You will drive risk assessment, change validation, and proactive quality improvements while collaborating with Torrance CA and Pune teams.

The role requires a Master’s in electrical engineering, 3+ years in semiconductor engineering, and experience with SiC power devices; SPC/8D tools and Arena PLM proficiency are highly valued.

Qualifications

• Master’s degree in electrical engineering or related field.
• 3+ years in semiconductor products, process or test engineering.
• Experience with SiC or other power devices preferred.
• Working knowledge of SPC and outlier-detection methods (SPAT/DPAT/GDBN).
• Experience with structured root-cause and corrective action (8D).
• Familiarity with PLM/BOM systems (Arena PLM) and hierarchical BOMs.

Responsibilities

• Own change control for released products (fab, test, assembly).
• Drive risk assessment, customer notification, and change validation.
• Monitor CP/KGD/FT to identify excursions and contain lots.
• Lead quality excursions using 8D and structured problem solving.
• Maintain hierarchical BOM in Arena PLM and align sites.

Skills

Semiconductor engineering

Statistical methods

Root-cause analysis

Cross-team collaboration

Excel / scripting

Education

Master’s in Electrical Engineering

Tools

Arena PLM

Python

JMP/JSL

Job description

Job DetailsJob Location: Pune

Key Responsibilities and Duties

• Own change control administration for released products, including fab, test, assembly and other manufacturing process changes
• Drive risk assessment, customer notification, and change validation
• Monitor circuit probe (CP), known good die test (KGD), and final test (FT) operations to identify excursions and contain affected lots quickly
• Develop non-conforming product reports, including root-cause analysis, risk assessment, and disposition
• Identify and resolve recurring product and process issues
• Support automated yield reporting and alerts to catch low-yield trends early
• Prioritize and execute the highest-ROI cost reduction and yield improvement projects; report progress against annual savings goals
• Manage SBL/SYL quality limits and hold-lot disposition
• Implement SPAT, DPAT, and GDBN methods to eliminate statistical outliers
• Lead quality excursion response using 8D methodology and structured problem solving
• Own and maintain the hierarchical BOM structure in Arena PLM
• Maintain specifications and work instructions; help standardize methodology across the Torrance and Pune engineering sites
• Originate and contribute to proactive, higher-scope strategic initiatives such as alternate-site or alternate-flow qualification.

QualificationsRequired Qualifications

• Master’s degree in electrical engineering, Materials Science, Semiconductor/Microelectronics Engineering, or a related technical field
• 3+ years of experience in semiconductor products, process, or test engineering, ideally spanning fab, wafer test/KGD, and assembly
• Experience with Silicon Carbide (SiC) or other power semiconductor devices strongly preferred
• Working knowledge of statistical process control and outlier-detection methods (e.g., SPC, SPAT/DPAT, GDBN)
• Experience with structured root-cause and corrective action methodologies (8D or equivalent)
• Familiarity with PLM/BOM systems (Arena PLM or similar) and hierarchical BOM structures are a strong plus
• Comfortable working with production and yield data; Excel or scripting skills (Python, JMP/JSL) a plus
• Strong written and verbal communication skills; able to collaborate closely with the Torrance, CA PE team across time zones
• Self-directed and comfortable operating in a newly established team, helping define processes as the team scales