PMTS, Design Verification Lead

GlobalFoundries Engineering Private Limited

Hyderabad

On-site

INR 4,000,000 - 7,000,000

Full time

14 days+
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Job summary

GlobalFoundries is seeking an experienced Design Verification Lead to drive verification strategy, planning, execution, and signoff for next‑generation RISC‑V based Processor IP products. You will lead a team of verification engineers ensuring functional correctness, quality and robustness of complex subsystems and full‑chip IP.

You will define coverage goals, signoff criteria, and verification milestones; architect scalable environments using SystemVerilog, UVM, assertions, and

Qualifications

  • BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • Typically 12+ years of relevant ASIC/SoC/Processor verification experience.
  • Proven track record leading verification teams for complex CPU/Processor IP products.

Responsibilities

  • Own verification strategy and signoff for processor IP products and subsystems.
  • Lead verification planning, methodology definition, execution, and closure activities.
  • Define coverage goals, quality metrics, signoff criteria, and milestones.
  • Drive verification readiness reviews, risk assessments, and program execution.
  • Provide technical direction and mentorship to verification engineers across projects.

Skills

SystemVerilog UVM
Assertions (SVA)
Constrained Random Verification
Formal Verification
RISC-V/ARM architectures
Leadership

Education

BS/MS in Electrical Engineering/Computer Engineering/Computer Science

Tools

Simulation & Emulation
Regression Infrastructure
FPGA Prototyping

Job description

Title: PMTS, Design Verification Lead
About GlobalFoundries

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visitwww.gf.com.

Introduction

We are seeking an experienced Design Verification Lead to drive verification strategy, planning, execution, and signoff for next-generation RISC-V based Processor IP products. The successful candidate will lead a team of verification engineers responsible for ensuring functional correctness, quality, performance, safety, and robustness of complex processor subsystems and full-chip IP solutions. This role requires strong technical leadership, deep expertise in processor architecture verification, and proven experience delivering high-quality silicon-proven IP products from specification through production release.

Key Responsibilities
  • Technical Leadership Own the verification strategy and verification signoff for processor IP products and subsystems. Lead verification planning, methodology definition, execution, and closure activities. Define coverage goals, quality metrics, signoff criteria, and verification milestones. Drive verification readiness reviews, risk assessments, and program execution. Provide technical direction and mentorship to verification engineers across multiple projects.
  • Verification Architecture & Methodology Architect scalable verification environments using SystemVerilog, UVM, assertions, and constrained-random methodologies. Define reusable verification infrastructure across multiple processor families. Establish methodology standards, coding guidelines, and best practices. Drive adoption of advanced verification techniques including formal verification, emulation, FPGA prototyping, and hardware/software co-verification.
  • Processor Verification Lead verification of CPU cores, DSP extensions, vector processing units, MMUs, caches, interrupts, debug infrastructure, security features, and system interfaces. Drive ISA compliance verification and architectural validation. Oversee development of directed, random, compliance, and software-driven test suites. Collaborate closely with architecture and design teams to ensure comprehensive verification coverage.
  • Project Execution Own verification schedules, resource planning, and execution tracking. Drive bug triage, root-cause analysis, and closure activities. Ensure verification deliverables meet quality, schedule, and product objectives. Present status, risks, and signoff readiness to executive leadership.
  • Cross-Functional Collaboration Partner with architecture, RTL design, validation, emulation, FPGA, functional safety, and software teams. Participate in requirements analysis and verification planning activities. Support customer engagements, technical reviews, audits, and product bring-up activities.
  • Quality & Signoff Own functional, code, assertion, and architectural coverage closure. Review verification plans, testbenches, and verification reports. Ensure compliance with product development and quality management processes. Drive continuous improvement of verification productivity and quality.
Required Qualifications
  • BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • Typically 12+ years of relevant industry experience in ASIC/SoC/Processor verification.
  • Proven track record leading verification teams for complex CPU, MCU, DSP, or Processor IP products.
  • Expert knowledge of: SystemVerilog UVM Assertions (SVA) Functional Coverage Constrained Random Verification Strong understanding of processor architectures and microarchitecture concepts.
  • Experience with: RISC-V, ARM, or equivalent processor architectures Simulation, emulation, and regression infrastructures Coverage-driven verification Verification signoff methodologies Excellent project leadership and communication skills.
Preferred Qualifications
  • Experience verifying: RISC-V processors Vector extensions DSP architectures Functional safety, Cyber Security products (ISO 26262, ISO 21434) Security, Security architectures
  • Experience with: Building env from scratch Formal verification Emulation platforms FPGA prototyping Performance verification Software-driven verification
  • Prior people leadership or technical leadership of globally distributed teams.
Equal Opportunity Statement

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Information about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia

Culture and Work Environment

We shape what's essential At GlobalFoundries you will find a vibrant work environment where collaboration and innovation thrive. Our diverse and global team shares a culture of respect and inclusivity, representing the best in the industry. We celebrate success together and are united by our dedication to excellence and our desire to improve and empower the world.

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