Physical Design Engineer/STA

844 Altera Semiconductor Technology India Pvt. Ltd.; Hyderabad; On-site; INR 800,000 - 1,400,000; Full time

Job summary

844 Altera Semiconductor Technology India Pvt. Ltd. in Hyderabad is seeking a skilled physical design engineer to implement custom IP and SoC designs from RTL to GDSII, preparing manufacturing-ready data.

You will handle synthesis, place and route, clock tree synthesis, floorplanning, STA, power integrity, and signoff processes, optimizing for power, frequency, and area. Proficiency with industry standard EDA tools and strong problem-solving abilities are required.

Qualifications

• Experience in physical design of ASIC/SoC blocks.
• Knowledge of timing, power, and reliability analysis.
• Familiarity with DFT and integration challenges.

Responsibilities

• Perform RTL to GDSII physical design flow.
• Conduct place and route, STA, and clock tree synthesis.
• Verify signoff including equivalence and signoff checks.
• Optimize designs for power, frequency, and area.

Skills

Physical design

Synthesis

Place & route

STA

Clock tree synthesis

Power/clock distribution

Tools

EDA tools

Job description

Job Details: Job Description:

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve product-level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Qualifications:

Job Type: Regular Shift: Shift 1 (India) Primary Location: Regus, Madhapur Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

About Altera Altera:

Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.