NOC Design Verification Engineer

QUALCOMM, Inc.; Bengaluru; On-site; INR 1,800,000 - 2,800,000; Full time

Job summary

Qualcomm India Private Limited is seeking a Design Verification Engineer to lead verification of AI, Networking, and interconnect IPs/sub-systems. You will drive architecture-aware DV from planning to closure with strong ownership and debugging skills.

The role requires deep protocol knowledge (e.g., PCIe, USB, Ethernet, CXL), AMBA familiarity, and Python scripting for automation. Collaboration in a fast-paced team is essential.

Qualifications

• Expert in SystemVerilog and UVM with reusable verification environments.
• Strong expertise in verification planning, constrained-random verification, SVA, and coverage.
• Independently own and drive IP/DV verification from spec to closure.
• Debugging across RTL, protocol, architecture, and testbench issues with root-cause analysis.
• Experience in verifying NoC, interconnects, memory subsystems, AI accelerators, or data fabrics.
• Deep protocol verification in PCIe, USB, Ethernet, CXL, or similar.
• Experience with AI Scale-Up/Scale-Out interconnects.
• Strong AMBA (AXI/AHB/ACE/CHI) knowledge and coherency architectures.
• Knowledge of performance verification, QoS, congestion, and system-level qualification.
• Proficiency in Python, Shell, Perl, or Tcl for regression automation.
• Familiarity with simulators, debug tools, coverage tools, CI/CD, emulation, and verification frameworks.
• Strong collaboration and leadership in fast-paced teams.

Responsibilities

• Lead verification of complex AI, Networking, Datacenter, HPC, and interconnect IPs/sub-systems.
• Own DV from architecture understanding through signoff-quality closure.
• Develop and maintain reusable verification environments and scoreboards.
• Analyze and debug issues across RTL, protocols, and testbenches.
• Collaborate with cross-functional teams to meet performance requirements.

Skills

SystemVerilog

UVM

Verification planning

Constrained random

UVCs/agents

Assertions & coverage

Debugging RTL issues

AMBA protocols

Python scripting

CI/CD familiarity

Education

B.Tech/M.Tech in Electronics/EE/CS/VLSI

Tools

Python

Tcl

CI/CD

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Role Summary

Seeking a highly skilled and self-driven Design Verification Engineer to lead verification of complex AI, Networking, Datacenter, HPC, and Interconnect IPs/Sub-systems. The candidate should demonstrate strong ownership, technical depth, and the ability to independently drive verification from architecture understanding through signoff-quality closure.

Key Responsibilities & Skills

• Expert in SystemVerilog (SV) and UVM, with hands-on experience in building reusable verification environments, UVCs/agents, sequences, scoreboards, checkers, assertions, and coverage infrastructure.
• Strong expertise in verification planning, constrained-random verification, SVA, functional coverage closure, regression management, and signoff methodologies.
• Proven ability to independently own and execute IP/Sub- System DV from specification review to verification closure.
• Strong debugging skills across RTL, protocol, architecture, performance, and testbench issues, with demonstrated root-cause analysis capability.
• Experience in verifying NoC, coherent/non-coherent interconnects, memory/cache subsystems, AI accelerators, or complex data movement fabrics.
• Deep protocol verification expertise in one or more of:
  • PCIe (Gen4/5/6)
  • USB (USB3.x/USB4)
  • Ethernet (10G/25G/100G/400G+)
  • CXL
  • Other high-speed serial/networking protocols
• Experience with AI Scale-Up / Scale-Out Interconnects such as UAL, UMAC, eSUN, or equivalent accelerator cluster fabrics.
• Strong understanding of AMBA protocols (AXI, AHB, ACE, CHI) and coherency architectures.
• Knowledge of performance verification, QoS validation, congestion analysis, scalability testing, and system-level qualification.
• Proficiency in Python, Shell, Perl, or Tcl for regression automation, infrastructure development, and productivity enhancement.
• Familiarity with industry-standard simulators, debug tools, coverage tools, CI/CD workflows, emulation, and verification automation frameworks.
• Strong collaboration, communication, technical leadership, and execution skills with the ability to thrive in a fast-paced environment.

Preferred Experience

• Verification experience in SoC, AI/ML Accelerators, Networking, Datacenter, Multi-Die, or HPC platforms.
• Exposure to SystemC/TLM modeling, performance modeling, emulation/prototyping, and post-silicon correlation.
• Track record of delivering first-pass verification closure for complex IPs and subsystems.

Qualifications

• B.Tech/M.Tech in Electronics, Electrical Engineering, Computer Science, VLSI, or related disciplines from reputed Tier-1 institutions (IITs, NITs, IIITs, BITS, or equivalent).
• Relevant industry experience aligned with the position level, demonstrating strong expertise in Design Verification, SV/UVM methodologies, protocol verification, and architecture-driven validation.
• Proven history of technical ownership and successful delivery of complex IP, Sub-System, or SoC verification programs.

Ideal Candidate

A hands-on verification expert with deep protocol knowledge, strong debugging capability, and the ability to independently architect, execute, and close verification of next-generation AI and high-performance silicon designs.

Applicants

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Policies

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.