Lead Verification Engineer

Advanced Micro Devices; Telangana; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

Advanced Micro Devices (AMD) seeks a Lead Verification Engineer in India to join the Radeon Technologies Group. You will collaborate with architecture, IP design, Physical Design, and product engineers to achieve first pass silicon success.

The role requires meticulous, detail‑oriented work with strong communication and problem‑solving skills, focusing on DFT verification and post‑silicon yield improvements. This position emphasizes hands‑on verification and cross‑functional teamwork.

Qualifications

• A degree in computer engineering or electrical engineering is required.
• Experience with DFT verification methodologies is essential.
• Strong problem‑solving and communication skills are needed.

Responsibilities

• Implement and verify DFT architecture and features.
• Perform scan insertion and ATPG pattern generation.
• Verify ATPG patterns using gate-level simulation.
• Analyze test coverage and reduce test costs.
• Provide post-silicon support to improve yield.

Education

Bachelor's or Master's degree in computer engineering / Electrical Engineering

Tools

Mentor TestKompress

Synopsys Tetramax/DFTMAX

VCS

Verilog RTL

Perl/Shell scripting

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re redesigning next‑gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger— technology that moves the world forward. Join us and, together, we’ll advance your career.

LEAD VERIFICATION ENGINEER

THE ROLE:

As a member of the Radeon Technologies Group, you will help bring to life cutting‑edge designs. As a member of the front‑end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work with senior silicon design engineer s. The candidate will be highly accurate and detail‑oriented, possessing good communication and problem‑solving skills.

KEY RESPONSIBILITIES:

• Implementation and verification of DFT architecture and features
• Scan insertion and ATPG pattern generation
• ATPG patterns verification with gate‑level simulation
• Test coverage and test cost reduction analysis
• Post silicon support to ensure successful bring up and enhance yield learning

REFERRED EXPERIENCE:

• Understanding of Design for Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, Scan, memory BIST etc.)
• Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
• Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering
• #LI-SR5

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.