Lead DFT DV Engineer

AMD

Hyderabad

On-site

INR 2,500,000 - 3,500,000

Full time

8 days ago
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Job summary

AMD in Hyderabad seeks a Senior DFT DV Engineer to join a leading verification team. You will drive DFT/MBIST/JTAG verification, design scalable SystemVerilog/UVM testbenches, and own verification plans across multi-die scenarios.

Collaborating with design and arch teams across sites/timezones, you will deliver industry-leading test strategies and robust debug coverage while advancing your career within AMD.

Qualifications

  • Bachelor’s degree with 7+ years or Master’s with 5+ years in Electronics/Electrical Engineering.
  • Strong experience in DFT verification and clocking/topology.
  • Experience with SystemVerilog/UVM and verification planning.

Responsibilities

  • Develop verification platform in SystemVerilog/UVM.
  • Drive verification tests and verification plan.
  • Coordinate with design/arch teams across sites/timezones.
  • Verify SCAN, MBIST and JTAG.

Skills

DFT design
DFT verification
SystemVerilog
UVM
Team collaboration
Communication

Education

Bachelors in Electronics or Electrical Engineering
Masters in Electronics or Electrical Engineering

Tools

SystemVerilog
UVM
MBIST
JTAG

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

LEAD DFT DV ENGINEER
THE ROLE:

We are looking for an adaptive, self-motivative DFT engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The DFTteam furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:

You have a passion for modern, digital design, and DFT in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

PREFERRED EXPERIENCE:
  • Good understanding and experience in DFT clocking and topology covering MBIST, JTAG verification, scan dump, understanding on ICL/PDL, debug scenarios like clock observation and analog observation, BScan, HSIO tests experience
  • Experience in multi die scenarios verification is preferable
  • Work closely with design /Arch team to prepare test list and complete the verification with all planned tests
  • Develop scalable verification platform in System Verilog / UVM. Able to guide team in writing assertions and checkers.
  • Be responsible for a comprehensive verification plan and drive the implementation of verification tests
  • Responsible for SCAN, MBIST and JTAG verification
ACADEMIC CREDENTIALS:

Bachelors degree w/7+ years or Masters degree w/5+ years in Electronics engineering/Electrical Engineering

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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