Lead CPU verification engineer

AMD; Bengaluru; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

AMD is seeking a CPU Verification Engineer – Core Verification Engineer in Bengaluru to drive verification across complex CPU features. You will collaborate with Architecture, Design and DV teams, create test plans, and lead the verification effort from bring‑up through tape‑out readiness.

The role demands deep knowledge of CPU architecture, Verilog/SystemVerilog, and strong communication. You will mentor engineers and contribute to process improvements in a globally distributed environment.

Qualifications

• Bachelor's or master's in Computer Science, Electrical or Electronics.
• At least 14+ years of CPU verification experience.
• Strong knowledge of computer architecture fundamentals.
• Experience with Verilog/SystemVerilog and some scripting.
• Able to lead small verification teams and coordinate cross‑functional work.

Responsibilities

• Understand features with stakeholders and clarify requirements.
• Develop high‑level test plans detailing stimulus, debug and coverage.
• Create directed and random test cases; debug RTL/verification bugs.
• Ensure feature health and adjust stimulus coverage as needed.
• Provide technical leadership and mentorship to engineers.

Skills

CPU architecture fundamentals

Verilog/SystemVerilog

C++ programming

Shell/Perl scripting

Team leadership

Communication skills

Education

B.E./B.Tech./M.E./M.Tech in CS/EE

Tools

VSI-FV

JASPER

IFV

IEV

Job description

CPU Verification Engineer – Core Verification Engineer

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.

Responsibilities

• Work with stakeholders to understand high‑level features, evaluate cross‑feature dependencies, and clarify requirements.
• Develop high‑level test plans detailing stimulus, debug, and coverage approaches; review, incorporate feedback, and maintain documentation.
• Create directed and random test cases to target feature bring‑up; debug failures, file and fix RTL/verification bugs and testbench issues.
• Ensure feature health remains stable; evaluate stimulus coverage and adjust as needed.
• Develop new C++ checkers when required, while learning and applying micro‑architecture knowledge.
• Achieve 100% functional coverage, collaborating with other feature owners when cross‑feature coverage is needed.
• On a need basis, recreate and resolve Post‑Si bugs.

Skills and Experience Requirements

• B.E/B.Tech/M.E/M.Tech in Computer Science, Electrical or Electronic Engineering.
• 14+ years of experience in CPU verification.
• Strong understanding of computer architecture fundamentals and digital systems.
• Knowledge of assembly (x86) code.
• Proficiency in Verilog, SystemVerilog, and C++; experience with shell/perl scripting is a plus.
• Familiarity with Formal Verification methodology and tools such as VSI‑FV, JASPER, IFV, IEV is a plus.
• Excellent team‑player, quick‑thinking, proactive, adaptable, and approachable.
• Excellent written and oral communication skills.
• Experience leading small teams, organizing and multitasking with due diligence.

Additional Key Responsibilities (Leadership & Team Management)

• Provide technical leadership and mentorship to verification engineers, guiding feature bring‑up, debug methodologies, and verification best practices.
• Drive verification planning and execution across multiple features/projects, ensuring alignment with program milestones, quality goals and tape‑out schedules.
• Lead technical reviews for test plans, verification environments, coverage closure strategies, and debug approaches.
• Coordinate across global teams (Architecture, Design, DV, Emulation, Post‑Si, Program Management) to resolve technical challenges and execution risks.
• Identify verification gaps, project risks and resource constraints proactively, and drive mitigation plans.
• Champion process improvements, automation initiatives, and adoption of new verification methodologies.
• Drive knowledge sharing through technical trainings, design reviews, and mentoring sessions.
• Provide technical direction during critical debug activities and help unblock engineers.
• Participate in hiring, onboarding and development of verification engineers.
• Foster a culture of collaboration, accountability, innovation, and engineering excellence across geographically distributed teams.

Additional Skills and Experience Requirements

• Demonstrated experience leading verification teams and driving execution of complex CPU verification projects.
• Strong technical leadership and mentoring skills with influence across teams.
• Proven track record delivering verification milestones for large‑scale CPU/SoC programs.
• Excellent stakeholder management with Architecture, RTL Design, Firmware, Post‑Silicon and Program Management teams.
• Strong project planning, prioritization, and execution skills in fast‑paced environments.
• Experience driving verification methodology improvements, automation initiatives, and productivity enhancements.
• Effective communication of technical concepts and project status to technical and management audiences.
• Experience in hiring, performance coaching and career development of engineering team members.

What You Will Learn

You will gain valuable experience in CPU design and verification, becoming familiar with the nuances and challenges of high‑performance, pipelined CPU architecture. This role offers insight into CPU micro‑architecture, and the chance to work on some of the most exciting projects in the industry.

Benefits

Benefits offered are described: AMD benefits at a glance.

Equal Opportunity Employer

AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.