IC Digital Design Engineer

Aumovio SE; Bengaluru; On-site; INR 2,500,000 - 5,000,000; Full time

Job summary

AUMOVIO is seeking an experienced digital design engineer to architect, implement, and verify front-end circuits for FPGA and ASIC platforms. You will drive architectural specifications, coding HDL modules, and participate in design reviews to ensure high reliability, performance, and scalability.

The role requires a strong HDL background, a track record in complex digital designs, and collaboration across engineering teams to deliver optimized, manufacturable solutions.

Qualifications

• Master’s or PhD in Electronics Engineering or a related field with 6+ years of relevant experience, or a Bachelor’s degree with 8+ years of experience in digital design, SoC integration, or ASIC digital architecture.
• Strong proficiency in HDL design languages (Verilog/SystemVerilog or VHDL).
• Proven track record delivering complex digital design projects across multidisciplinary teams.
• Deep expertise in ASIC and FPGA design methodologies and front-end flows.
• Working knowledge of UVM is a strong plus; familiarity with DFT/DFM is beneficial.

Responsibilities

• Architect, design, and verify digital front-end circuits and systems for FPGA/ASIC implementations.
• Lead design reviews and provide feedback to improve robustness and efficiency.
• Collaborate across disciplines to define optimal system concepts and digitization initiatives.
• Ensure documentation of requirements, architecture, specifications, and block-level details.
• Maintain and improve HDL development workflows, toolchains, and verification strategies.

Skills

Verilog/SystemVerilog

VHDL

UVM

DFT/DFM

Synthesis/Simulation

CDC/RDC

Education

Master’s or PhD in Electronics Engineering

B.E./BTech in Electronics & Communication

Tools

Siemens Questa Formal

Synopsys Spyglass

Job description

Job Description

Internal

Responsibilities

• Architect, design, and verify complex digital front-end circuits and systems for FPGA and ASIC implementations, including defining digital design requirements, developing architectural specifications, and coding high-quality HDL modules that meet performance, reliability, and scalability targets.
• Execute all assigned tasks with strong focus on reusability, efficiency, and area-optimized design.
• Lead/participate in comprehensive design reviews, providing clear, constructive feedback to enhance design robustness, quality, and development efficiency.
• Apply mixed-signal understanding (is a strong plus) to ensure smooth integration of digital front-end architectures with analog and mixed-signal components.
• Proactively define optimal system and component-level concepts, driving digitization initiatives in close collaboration with engineers from all relevant disciplines.
• Collaborate with cross-functional engineering teams (eg. application and system engineers) to establish cost-effective solutions that meet functional, performance, and architectural objectives.
• Provide technical guidance and mentorship during reviews and technical discussions, contributing to a culture of engineering excellence.
• Continuously refine and enhance digital design methodologies, development workflows, and toolchains to increase productivity and design consistency.
• Create and maintain comprehensive digital design documentation, including requirements, architecture descriptions, design specifications, and block-level details.
• Document and/or review design processes, verification strategies, test plans, and results in compliance with industry standards and best practices.

Required Qualifications

• Master’s or PhD in Electronics Engineering or a related technical field with 6+ years of relevant experience, or a Bachelor’s degree with 8+ years of experience in digital design, SoC integration, or ASIC digital architecture.
• Internal
• Strong proficiency in hardware description languages (HDLs) such as Verilog and SystemVerilog or VHDL.
• Proven track record of delivering complex digital design projects and collaborating effectively across multidisciplinary teams.
• Deep expertise in ASIC and FPGA design methodologies, including front-end architecture and implementation flows.
• Working knowledge of UVM is a strong plus.
• Experience with Design for Testability (DFT) and Design for Manufacturing (DFM) practices, is a plus.
• Strong understanding of the digital design flow, including synthesis, simulation, static timing analysis, and related front-end development processes.
• Hands-on experience with formal verification tools, such as Siemens Questa Formal and Synopsys Spyglass.
• Good understanding of CDC (Clock Domain Crossing), RDC (Reset Domain Crossing), and multi-power-domain design techniques.

Internal

Qualifications

B.E/ BTech in E&C (Masters in VLSI recommended)

Additional Information

Ready to take your career to the next level? The future of mobility isn’t just anyone's job. Make it yours! Join AUMOVIO. Own What's Next.

Company Description

Since its spin-off in September 2025 AUMOVIO continues the business of the former Continental group sector Automotive as an independent company. The technology and electronics company offers a wide-ranging portfolio that makes mobility safe, exciting, connected, and autonomous. This includes sensor solutions, displays, braking and comfort systems as well as comprehensive expertise in software, architecture platforms, and assistance systems for software-defined vehicles. In the fiscal year 2024 the business areas, which now belong to AUMOVIO, generated sales of 19.6 billion Euro. The company is headquartered in Frankfurt, Germany and has about 87.000 employees in more than 100 locations worldwide.