HFT FPGA Engineer

Syndicate Finance; Mumbai; À distance; INR 3 000 000 - 6 000 000; Plein temps

Résumé du poste

Syndicate Finance is seeking a Senior FPGA Engineer with deep expertise in C++ and low-latency trading systems. You will design, optimize, and implement FPGA-accelerated components and software to support high-frequency strategies.

The role involves working on market-data processing, order-management, and execution paths, with a strong emphasis on latency, determinism, and reliability in a remote, India-wide setup.

Qualifications

• Senior HFT FPGA engineer with strong C++ background.
• Experience building FPGA-based, low-latency trading systems.
• Understanding of electronic trading, market data, and exchange protocols.

Responsabilités

• Develop FPGA based high-frequency and algorithmic trading strategies.
• Design and implement FPGA based ultra-low-latency trading systems in C++.
• Develop and optimize market-data processing, order-management, and execution components.
• Work with FPGA-based technologies for low-latency market-data processing and trading applications.
• Optimize systems for latency, throughput, determinism, and reliability.
• Work with real-time market data, order books, exchange protocols, and execution systems.
• Conduct strategy simulation, backtesting, and performance analysis.
• Profile and optimize existing systems at both software and hardware levels.
• Collaborate with quantitative researchers and trading/infrastructure teams to take strategies from research to production.

Connaissances

C++ programming

Low-latency development

Outils

FPGA design

Hardware acceleration

Description du poste

We are looking for a highly skilled Senior HFT based FPGA Engineer with strong experience in C++ and FPGA-based low-latency systems to join our team remotely from anywhere in India.

The role will focus on the development, optimization, and implementation of high-frequency trading (HFT) strategies and low-latency trading infrastructure. The ideal candidate should have a strong understanding of financial markets, electronic trading systems, performance‑critical C++ development, and FPGA-based acceleration.

Key Responsibilities

Develop FPGA based high-frequency and algorithmic trading strategies.

Design and implement FPGA based ultra-low-latency trading systems in C++.

Develop and optimize market-data processing, order-management, and execution components.

Work with FPGA-based technologies for low-latency market-data processing and trading applications.

Optimize systems for latency, throughput, determinism, and reliability.

Work with real-time market data, order books, exchange protocols, and execution systems.

Conduct strategy simulation, backtesting, and performance analysis.

Profile and optimize existing systems at both software and hardware levels.

Collaborate with quantitative researchers and trading/infrastructure teams to take strategies from research to production.