Hardware Design Intern

Techlanz; Bengaluru; On-site; INR 420,000 - 640,000; Full time

Job summary

Techlanz in Bengaluru, India is seeking a fresh engineering graduate to join our hardware team. You will work on MCU, sensor, and power circuits, using Altium Designer or KiCad to capture schematics and contribute to PCB layouts.

You will prepare fabrication files, perform lab bring-up and basic firmware flashing, and support EMI/EMC checks. This role emphasizes hands-on testing, documentation, and collaboration with firmware and mechanical teams.

Qualifications

• Bachelor's degree in Electronics/EEE with fundamentals in analog and digital circuits.
• Ability to read datasheets and select components.
• Hands-on lab skills with test equipment.
• Familiarity with PCB fabrication and assembly processes.
• Experience in version control and documentation.

Responsibilities

• Assist schematic capture for MCU, sensor, and power circuits.
• Contribute to PCB layout decisions and prepare Gerbers/BOM.
• Support board bring-up and basic firmware flashing via JTAG/SWD.
• Perform lab validation using scope, LA, DMM; log test notes.
• Debug signal integrity and grounding issues with root-cause analysis.
• Prepare build reports and documentation for stakeholders.

Skills

Analog electronics

Digital electronics

Schematic/PCB design

Lab testing & debugging

Education

BE/B.Tech in Electronics & Communication Engineering

Tools

Altium Designer

KiCad/Eagle

Job description

• Assist in schematic capture for MCU-, sensor-, and power-based circuits using Altium/KiCad under guidance.
• Contribute to PCB layout activities (layer stack decisions, placement, routing, DRC fixes) and prepare fabrication/assembly files (Gerbers, BOM, pick-and-place).
• Support board bring-up: solder/rework prototypes, power-on testing, interface checks (I C, SPI, UART), and basic firmware flashing via JTAG/SWD.
• Execute lab validation using oscilloscope, logic analyzer, DMM, and power supplies; log measurements and anomalies with clear test notes.
• Debug common hardware issues (signal integrity, noise, grounding, power rails) with systematic root-cause analysis.
• Perform component selection from datasheets; create and maintain symbols/footprints and accurate BOMs.
• Run basic simulations (LTspice/PSPICE) for filters, power stages, and signal chains; compare results with bench data.
• Participate in design reviews; capture actions, implement fixes, and update documentation/version control (Git).
• Support DFM/DFT readiness: footprints, test-points, panelization inputs, and assembly guidelines for EMS partners.
• Assist in pre-compliance checks for EMI/EMC and ESD handling practices; document findings and propose mitigations.
• Collaborate with firmware/mechanical teams to resolve electro-mechanical fit, connector pinouts, and interface timing.
• Prepare concise build reports, test plans, and user notes for internal and manufacturing stakeholders.

Qualifications, Experience, Skills

• B.E./B.Tech or M.E./M.Tech in ECE/EEE (final-year or recent graduate); strong analog/digital electronics fundamentals.
• Familiarity with schematic/PCB tools (Altium Designer or KiCad/Eagle) and library management (symbols, footprints, 3D).
• Working knowledge of microcontrollers (STM32/ESP32/AVR) and common interfaces: I C, SPI, UART, GPIO, ADC/DAC.
• Hands-on with lab equipment (oscilloscope, logic analyzer, DMM, bench PSU) and safe ESD practices.
• Basics of power electronics (buck/boost regulators, LDOs), decoupling, grounding, and signal integrity.
• Ability to read datasheets, create BOMs, and perform component derating/alternates identification.
• Exposure to circuit simulation (LTspice/PSPICE/Multisim) and simple worst-case/thermal checks preferred.
• Understanding of prototyping workflows (reflow/soldering, rework) and bring-up/board-level debugging.
• Bonus: awareness of EMI/EMC considerations, IEC/BIS safety norms, and DFM/DFT for volume manufacturing.
• Strong documentation habits, version control (Git), curiosity, and willingness to learn in a fast-paced environment.