GPU Senior Logic Design Engineer

Intel Corporation; Bengaluru; Hybride; INR 3 200 000 - 7 200 000; Plein temps

Résumé du poste

Intel Corporation in Bengaluru (India) is seeking a GPU Senior Logic Design Engineer to develop RTL for media IP blocks and contribute to architecture/microarchitecture decisions. You will optimize designs for power, performance, and area, and support integration across SoC verification hierarchies.

The role involves creating RTL, running simulations, and building C/Perl/Python models to support verification, with a focus on robust, verifiable designs in a hybrid work model.

Qualifications

• Bachelor's or Master's degree in CE/EE with 6–8+ years RTL design experience.
• Proficient in SystemVerilog with strong digital logic design background.
• Experience with verification, synthesis, and timing analysis tools.
• Familiarity with video codecs would be a plus.

Responsabilités

• Design RTL and microarchitecture for media IP blocks.
• Develop, implement, and validate RTL design; optimize for power, perf, area.
• Create behavioral models in C/Perl/Python to support verification.
• Support SoC integration and verification across hierarchies.

Connaissances

Computer system architecture

Digital electronics and logic design

Verilog or SystemVerilog

Logic verification, synthesis, timing

C, Perl, and Python programming

AI-assisted ASIC Design and VERIF

Formation

Bachelor's degree in Computer Engineering or Electrical Engineering

Master's degree in Computer Engineering or Electrical Engineering

Outils

Verilog/SystemVerilog tools

Description du poste

## GPU Senior Logic Design EngineerApply: India, Bangalore: Full time: Posted Today: JR0288125# **Job Details:**## Job Description:GPU Senior Logic Design Engineer:Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation for Media IP components. This includes generating essential components such as libraries and functional units and delivering complete IP blocks for full chip design integration. Participate in the definition of architecture and microarchitecture features of the block being designed. Apply various strategies, tools, and methods to generate/write RTL and optimize the logic to meet power, performance, area, timing goals, and design integrity for physical implementation. Review the verification plan and the implementation to ensure design features are correctly verified across verification hierarchies. Drive unit level verification and implement corrective measures for failing RTL tests to ensure feature correctness. Supports SoC customers to ensure high-quality integration of Media IP block. Your contributions will directly impact Intel's ability to deliver innovative graphics technologies to our customers, helping shape the future of computingBusiness group: Intel's Media HW Engineering teamKey Responsibilities• Conduct feature feasibility studies, performance analysis, and microarchitecture design based on landing zone requirements• Design a wide variety of digital logic functions with the emphasis on media encoder/decoder design• Develop, implement, and validate Register Transfer Level (RTL) design• Perform power, performance, area, and timing optimization to meet design goals• Developing C or Perl behavioral models to support RTL functionality verification• Utilize AI models to enhance specification development, RTL code generation, and verification collateral creation## **Qualifications:**Education and Experience• Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field with 8+ years of industry experience in RTL design and logic development with expertise in System Verilog.OR• Master's degree in Computer Engineering, Electrical Engineering, or a related field with 6+ years of industry experience in RTL design and logic development with expertise in System Verilog.Required skills and experience• Computer system architecture• Digital electronics and logic design• Verilog or System Verilog• Logic verification, synthesis, and timing analysis tools• C, Perl, and Python programming• AI-assisted ASIC Design and Verification tools.Preferred skills and experience• Knowledge of video codec standards such as H.264, HEVC, VP8/9, AV1, VVC, and other popular codecs• Advanced knowledge of microarchitecture fundamentals and logic design verification methodologies.• Strong communication, collaboration, and problem-solving skills• Self-motivated and self-directed, with the ability to work effectively both independently and as part of a team• Proven ability to effectively debug microarchitecture and hardware simulations.## Job Type:Experienced Hire## Shift:Shift 1 (India)## Primary Location:India, Bangalore## Additional Locations:## Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.## ## Position of TrustN/A**Work Model for this Role**This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. \\* Job posting details (such as work model, location or time type) are subject to change.