Dft lead Engineer

Angel and Genie; Bengaluru; On-site; INR 50,00,000 - 90,00,000; Full time

Job summary

A leading semiconductor firm in Bengaluru is looking for a passionate and energetic DFT Lead with at least 10 years of relevant experience. The ideal candidate will manage DFT features for SoCs, focusing on implementation and verification. Applicants should hold a Bachelor's or Master's in Electrical/Computer Engineering and have a strong background in ATPG and SCAN processes. Competitive salary offered.

Qualifications

• 10+ years of relevant experience for Bachelor's or 8+ years for Master's degree.
• Strong experience in DFT features, IP and SoC DFT.
• Lead DFT for multiple SoCs.

Responsibilities

• Implement DFT features for multiple SoCs.
• Work on DFT Architecture, SCAN insertion, ATPG.
• Drive DFT implementation including MBIST, TAP.

Skills

Strong experience of ATPG background

Experience in SCAN related processes

Post-silicon support experience

Education

Bachelors in Electrical/Computer Engineering

Masters degree in Electrical/Computer Engineering

Job description

DFT Lead- Bangalore- 10+ years experience

Job Category: Electronic & Semiconductor

Job Type: Full Time

Job Location: Bangalore

Salary: 50- 90LPA

Years of Experience: 10+ years

We are looking for an energetic, passionate and process oriented DFT Lead who has extensive experience in planning, implementation and verification of DFT features for multiple SoC.

Direct Responsibilities of the role, but not limited to,

• working on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass DFT, RTL implementation, Verification, Scan and ATPG.
• SCAN insertion, ATPG and pattern simulation/debug.
• MBIST and Repair implementation and verification
• TOP DFT architecture Design
• ATE vector setup and Yield improvement
• The candidate must be able to drive the DFT implementation for various features including Scan, MBIST, TAP etc. and should have executed at-least 3 full SoC end to end as a DFT engineer.

Qualifications

• Bachelors in Electrical/Computer Engineering, Computer Science or related field plus 10+ years of relevant experience OR a Masters degree in Electrical/Computer Engineering, Computer Science or related field with 8+ years of relevant experience.
• Strong experience of ATPG background, Good experience into SCAN related process.
• Previous experience of working with manufacturing engineering, on pattern delivery, post-silicon support are definite plus.

Previous experience of architecting the DFT for multiple SoCs, leading team members and Signing off DFT for multiple SoCs