Design Verification Engineer

Analog Devices; Hyderabad; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Analog Devices in Hyderabad seeks a Design Verification Engineer to develop verification environments and execute verification activities for automotive connectivity SoCs based on E2B technology.

You will work on complex devices incorporating embedded processors, digital communication subsystems, firmware, security functions, and mixed-signal components. Cross-functional collaboration is required to ensure designs meet functional and reliability requirements before tape-out.

Qualifications

• Proficiency in SystemVerilog and UVM for verification environments.
• Experience in building coverage-driven testbenches and test scenarios.
• Understanding of digital verification concepts for blocks, subsystems, or SoCs with processors and memories.
• Experience with C programming and DPI integration into SystemVerilog.
• Proficient in debugging verification failures across testbenches, RTL, and firmware.

Responsibilities

• Develop and maintain SystemVerilog/UVM verification environments, including agents, sequences, monitors, and coverage.
• Verify SoC functionality involving embedded processors, memories, interconnects, and peripherals.
• Translate design requirements into test scenarios, coverage items, and verification objectives.
• Develop directed and constrained-random tests for block-, subsystem-, and SoC-level verification.
• Develop and execute verification scenarios for microprocessor-based SoCs, including boot sequences and firmware interactions.
• Develop and maintain C/SystemVerilog DPI interfaces and integrate C models into simulations.
• Verify E2B communication functionality, including configuration, data transfer, timing, and error handling.
• Analyze coverage, identify gaps, and drive verification closure; run regressions and debug failures.

Skills

SystemVerilog/UVM

Testbench Development

SoC verification

C DPI

Debugging

Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X .

Design Verification Engineer

Automotive Connectivity SoCs and E2B Technology

About the Role

As a Design Verification Engineer at Analog Devices, you will develop verification environments and execute verification activities for next-generation automotive connectivity SoCs based on E2B technology.

You will work on complex devices incorporating embedded processors, digital communication subsystems, firmware, security functions, and mixed-signal components. Working with moderate supervision, you will collaborate with design, architecture, firmware, functional safety, and validation teams to ensure that designs meet their functional, quality, and reliability requirements before tape-out.

You will contribute to SystemVerilog /UVM testbench development, C DPI integration, coverage analysis, regression execution, and debugging of hardware-software interactions. This position provides an opportunity to develop expertise in automotive SoC verification while contributing to technologies that enable reliable, high-performance in-vehicle connectivity.

Key Responsibilities

• Verification Environment Development: Develop and maintain SystemVerilog /UVM verification environments, including agents, sequences, monitors, scoreboards, reference models, assertions, and functional coverage.
• SoC Verification: Verify SoC functionality involving embedded processors, memories, interconnects, interrupts, DMA controllers, peripherals, communication interfaces, and mixed-signal subsystems.
• Verification Planning: Contribute to verification plans by translating design and product requirements into test scenarios, coverage items, and verification objectives.
• Test Development: Develop directed and constrained-random tests for block-level, subsystem-level, and SoC-level verification.
• Processor-Based Verification: Develop and execute verification scenarios for microprocessor-based SoCs, including processor initialization, register accesses , interrupts, exceptions, boot sequences, and basic firmware interactions.
• C DPI Integration: Develop and maintain C/ SystemVerilog DPI interfaces and integrate C-based models or reference functions into simulation environments.
• E2B Functionality: Verify E2B communication functionality, including configuration, control, data transfer, timing behavior, error handling, diagnostics, and recovery scenarios.
• Coverage and Metrics: Analyze functional , code, and assertion coverage; identify verification gaps; and develop additional tests to support verification closure.
• Regression Execution: Execute and monitor verification regressions, analyze failures, classify issues, and communicate results to the project team.
• Debugging: Analyze and resolve verification failures across testbenches, RTL, embedded C code, reference models, and system-level scenarios.
• Functional Safety Support: Contribute to verification of automotive safety mechanisms, fault injection tests, requirements traceability, and verification evidence for ISO 26262-related activities.
• Cross-Functional Collaboration: Work with design, architecture, firmware, functional safety, validation, and applications teams to resolve technical issues and support project milestones.
• Documentation: Create and maintain clear documentation covering verification plans, testcases, coverage results, known issues, and verification status.
• Automation: Develop scripts to automate regression execution, results analysis, coverage reporting, and other verification workflows.
• Technical Reviews: Participate in design, architecture, verification plan, and code reviews, providing verification-focused feedback.

Must-Have Skills

• SystemVerilog and UVM: Proficiency in developing and maintaining verification environments using SystemVerilog and the Universal Verification Methodology.
• Testbench Development: Experience developing coverage-driven verification components and testcases for complex digital designs.
• Digital and SoC Verification: Understanding of digital verification concepts and experience verifying blocks, subsystems, or SoCs containing processors, memories, buses, interrupts, peripherals, or communication interfaces.
• C and C DPI: Experience with C programming and familiarity with integrating C models or functions into SystemVerilog environments through DPI.
• Verification Techniques: Experience with directed testing, constrained-random verification, functional coverage,