CPU Design Sr Lead Verification Engineer Bangalore, India Hardware Engineering

Qualcomm; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Benefits offered by this job

Disability accommodations

Job summary

Qualcomm India Private Limited in Bengaluru is seeking strong DV engineers to verify high performance and low power CPUs in Bangalore. You will work with CPU design/verification teams to develop comprehensive test plans and verify power management features using simulation, formal methods and UPF-based flows.

The role requires hands-on experience with C/C++, Verilog/SystemVerilog, and scripting, with strong knowledge of clock gating, power gating, DVFS/DCVS, and reliability concerns.

Qualifications

• Bachelor's degree in CS/EE and 4+ years of Hardware Engineering or related work experience.
• Master's degree in CS/EE and 3+ years of Hardware Engineering or related work experience.
• PhD in CS/EE and 2+ years of Hardware Engineering or related work experience.
• BE/BTech CS/EE with 4+ years’ experience.
• Experience in power management verification.
• Implementation of assembly and C language embedded firmware.
• Experience in C/C++, scripting languages, Verilog/system Verilog.
• Strong understanding of power management features in CPUs/SoCs.
• Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling.

Responsibilities

• Power management verification including Boot, Reset, clock gating, power gating, voltage/frequency management, limits and throttling.
• Work with design/verification teams to develop comprehensive test plans.
• Write checkers, assertions and develop stimulus using simulation and formal methods.
• Verify power intent through UPF-based flows.
• Collaborate with system architects, software teams and SoC teams to validate use cases.
• Coordinate with the emulation team to enable verification on emulators and FPGA platforms.
• Debug and triage failures in simulation, emulation and/or silicon.

Skills

Power management verification

C/C++

Verilog/SystemVerilog

Scripting languages

UPF

DVFS/DCVS

Clock gating

Power gating

Education

Bachelor's degree in CS/EE

Master's degree in CS/EE

PhD in CS/EE

BE/BTech CS/EE

Tools

Emulation

FPGA

Simulation tools

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore.

Roles and Responsibilities:

• Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling.


• Work closely with design/verification teams within CPU to develop comprehensive test plan.


• Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus.


• Verify power intent through use of methodologies like UPF.


• Work closely with system architects, software teams and Soc team to validate system use cases.


• Work closely with emulation team to enable verification on emulators and FPGA platforms.


• Debug and triage failures in simulation, emulation and/or Silicon.

Minimum Qualifications:

• • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.


• OR


• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.


• OR


• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.


• BE/BTech degree in CS/EE with 4+ years’ experience.


• Experience in power management verification.


• Implementation of assembly and C language embedded firmware.


• Experience in C/C++, scripting languages, Verilog/system Verilog.


• Strong understanding of power management features in CPUs and CPU based Socs.


• Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc.

Preferred Requirements:

• Good Understanding of CPU architectures and CPU micro-architectures.


• In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture


• Experience with advanced verification techniques such as formal and assertions is a plus


• Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.