Chip Power Estimation Engineer

NVIDIA; Bengaluru; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

NVIDIA is seeking an engineer to work on architectural power estimation for GPUs and SOCs, developing advanced power models to estimate chip and board power in product use cases.

You will correlate models with silicon data, study power/performance trade-offs, and collaborate with architecture, design, timing, and post-silicon teams to drive efficient, scalable power estimation solutions.

Qualifications

• B.Tech./M.Tech in relevant field with 2+ years of experience in power/performance estimation and optimization.
• Strong fundamentals in transistor-level leakage/dynamic characteristics of VLSI circuits.
• Familiarity with low power design techniques such as multi VT, Clock gating, Power gating, and DVFS.
• Proficiency in power estimation techniques, flows and algorithms; Python preferred.
• Good programming skills with object-oriented programming and design.

Responsibilities

• Architect, develop and calibrate power estimation models/tools for NVIDIA's chips.
• Contribute to use-case based power models including Idle power and IO power.
• Design tools and testing methodologies for these models and infrastructures.
• Calibrate models with measured silicon data and adjust configurations for optimal Power/Performance.
• Analyze chip configuration options to optimize power consumption for upcoming chips.

Skills

Power estimation

Python

OO programming

DVFS

Education

B.Tech./M.Tech in relevant field

Tools

PTPX

EPS

Job description

NVIDIA is seeking a passionate, creative, and highly motivated engineer to work on architectural power estimation for the world's leading GPUs and SOCs. In this position, the responsibility includes development of advanced power models to estimate chip and board power under product driven use cases. You are expected to understand the high-level chip architecture, application use-cases, low power design techniques, process technology aspects which impact dynamic and leakage power, develop the estimation infrastructure, estimate power consumption under various scenarios. You will be working with architecture, design, synthesis, timing, circuit, and post silicon teams to accomplish your tasks.

What You'll Be Doing

• Architecture, development and correlation of power estimation models/tools for NVIDIA's chips
• Help architect and develop power models for use-cases, Idle power and IO power.
• Chip in to design the tools based on these models and their testing methodology/infrastructures
• Correlate and Calibrate the power models using measured silicon data
• Analyze and help decide the chip configuration and process technology options to optimize power/performance for NVIDIA's upcoming chips
• Help study and contribute to Performance/Watt improvement ideas for NVIDIA's GPUs and SOCs

What We Need To See

• B.Tech./M.Tech and 2+ years of experience related to Power / Performance estimation and optimization techniques
• Strong fundamentals in power including transistor-level leakage/dynamic characteristics of VLSI circuits
• Familiarity with low power design techniques such as multi VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS)
• Strong background in power estimation techniques, flows and algorithms
• Good programming skills - Python preferred. Good skills with object-oriented programming and design.

Ways To Stand Out From The Crowd

• Exposure to lab setup including power measurement equipment such as scope/DAQ with ability to analyze board level power issues is a plus
• Exposure to power analysis EDA tools such as PTPX/EPS
• Good communication skills & desire to work as a great teammate

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world.

We are an equal opportunity employer and value diversity at our company.

We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.