ASIC front-end verification engineer

Zerto

Bengaluru

On-site

INR 1,200,000 - 1,800,000

Full time

14 days+
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Benefits offered by this job

Health & wellbeing
Career development
Inclusive culture

Job summary

Hewlett Packard Enterprise in Bengaluru is seeking an experienced ASIC front-end verification engineer to join our design team. You will work on advanced verification environments and contribute to tape-out readiness.

The role emphasizes SystemVerilog/UVM verification, front-end tools, and collaboration with designers and software teams. Onsite in India with opportunities to grow in a global edge-to-cloud company.

Qualifications

  • Experience with ASIC verification using SystemVerilog.
  • Knowledge of constrained-random verification and UVM methodologies.
  • BSEE/MSEE degree; Ethernet networking experience desirable.

Responsibilities

  • Architect and develop block-level verification environments using SystemVerilog and UVM.
  • Define and deliver verification suites for ASICs using front-end simulators (VCS/NC).
  • Verify large ASIC blocks and sign off tape-out with coverage analysis.
  • Collaborate with logic designers and software teams to resolve bugs.
  • Develop scripts (Perl/Python/Shell) to improve verification infrastructure.

Skills

SystemVerilog
UVM
Constrained random
Perl/Tcl scripting
Ethernet protocols
ASIC debugging

Education

MSEE or BSEE

Tools

VCS
NC

Job description

ASIC front-end verification engineer

This role has been designed as 'Onsite' with an expectation that you will primarily work from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Description:

Job Family Definition:

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.

Management Level Definition:

Contributions include applying intermediate level of subject matter expertise to solve common technical problems. Acts as an informed team member providing analysis of information and recommendations for appropriate action.

At HPE, you will have a significant opportunity to interact with system design teams across geographies. We are a team built on a foundation of open communications, empowerment, innovation, teamwork and customer success with "pay for performance" culture. Thus, you set your own limits for learning, achievements and rewards.

What you'll do:

  • You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites.
  • Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%)
  • Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Use various front-end simulator tools (VCS/NC) to perform this activity. (25%)
  • Verify large ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage and Gate level simulation. (30%)
  • Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development. (10%)
  • Develop Perl, Python and/or shell scripts to improve current verification infrastructure/methodology (5%)

What you need to bring:

  • ASIC Verification using SystemVerilog
  • Experience in constrained-random verification is a strong plus
  • Experience with verification methodology like OVM/VMM/UVM
  • Perl/Tcl scripting is strongly preferred
  • Experience verifying networking protocols such as Ethernet is desirable
  • Strong problem solving and ASIC debugging skills
  • MSEE or BSEE is required.
Additional Skills
  • Accountability
  • Accountability
  • Action Planning
  • Active Learning
  • Active Listening
  • Agile Methodology
  • Agile Scrum Development
  • Analytical Thinking
  • Bias
  • Coaching
  • Creativity
  • Critical Thinking
  • Cross-Functional Teamwork
  • Data Analysis Management
  • Data Collection Management (Inactive)
  • Data Controls
  • Design
  • Design Thinking
  • Empathy
  • Follow-Through
  • Group Problem Solving
  • Growth Mindset
  • Intellectual Curiosity (Inactive)
  • Long Term Planning
  • Managing Ambiguity {+ 5 more}
What We Can Offer You:
  • Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
  • Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.
  • Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

#india#networking

Job:

Engineering

Job Level:

TCP_02

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

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