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Synopsys Inc. is seeking an experienced Physical Verification Applications Engineer in Bengaluru, India. You will lead PV signoff across advanced semiconductor technologies, drive DRC/LVS/ERC/PERC per design goals, and develop scalable verification methodologies.
Collaborate with design, technology, and foundry teams to resolve complex signoff challenges and mentor junior engineers. Strong scripting and automation skills are essential, as is deep knowledge of 7nm/5nm/3nm signoff methodologies.
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, enabling breakthroughs in AI, high-performance computing, automotive, mobile, and cloud infrastructure. We deliver industry-leading silicon design, verification, IP, and software solutions that help customers bring innovative products to market faster and with greater confidence.
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, enabling breakthroughs in AI, high-performance computing, automotive, mobile, and cloud infrastructure. We deliver industry-leading silicon design, verification, IP, and software solutions that help customers bring innovative products to market faster and with greater confidence.
Our Physical Verification Applications Engineering team partners closely with semiconductor companies, foundries, and internal engineering organizations to solve the industry's most complex signoff challenges. We develop advanced methodologies, drive technology adoption, and help customers achieve predictable design closure on the most advanced process nodes.
Our Physical Verification Applications Engineering team partners closely with semiconductor companies, foundries, and internal engineering organizations to solve the industry's most complex signoff challenges. We develop advanced methodologies, drive technology adoption, and help customers achieve predictable design closure on the most advanced process nodes.
Our Physical Verification Applications Engineering team partners closely with semiconductor companies, foundries, and internal engineering organizations to solve the industry's most complex signoff challenges. We develop advanced methodologies, drive technology adoption, and help customers achieve predictable design closure on the most advanced process nodes.
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You are a seasoned Physical Verification expert with deep experience in signoff verification and semiconductor design methodologies. You understand that successful tapeout requires more than running verification decks. It demands technical leadership, scalable methodologies, automation, and close collaboration across multiple engineering disciplines.
You thrive on solving complex DRC, LVS, ERC, Density, Antenna, and reliability verification challenges at advanced technology nodes. You are comfortable working directly with customer engineering teams, understanding their design bottlenecks, and driving solutions that improve productivity and accelerate design closure.
You enjoy mentoring engineers, influencing technical strategy, and developing innovative verification methodologies that scale across projects and organizations.
The Physical Verification Applications Engineering team develops, enhances, and deploys industry‑leading verification solutions that enable reliable signoff and manufacturability for advanced semiconductor designs.
The team works closely with customers, foundries, and internal engineering organizations to address emerging technology challenges, accelerate adoption of Synopsys verification products, and drive innovation in methodology development, automation, and design closure.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.