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MathWorks seeks an Application Engineer for Signal Processing, Communications, and FPGA Design in Bangalore on a hybrid work model. You will partner with customers to establish MATLAB and Simulink as a platform for diverse applications, including FPGA/SDR prototyping, HDL code generation, and verification.
You will lead pre-sales demonstrations, develop adoption plans, and collaborate with Sales to craft account strategies.
MathWorks has a hybrid work model that enables staff members to split their time between office and home. The hybrid model provides the advantage of having both in-person time with colleagues and flexible at-home life optimizations. Learn More: https://www.mathworks.com/company/jobs/resources/applying-and-interviewing.html#onboarding.
As an Application Engineer for Signal Processing, Communications, and FPGA Design, you will partner with our most innovative customers to establish MATLAB and Simulink as a platform for a variety of application areas including:
You will work in a pre‑sales manner with our customers to identify and understand their technical and business challenges. You will develop and deliver compelling demonstrations of solutions that help customers appreciate how the adoption of MathWorks products adds value towards enhancing their workflows. You will also engage strategically with customers in developing long‑term adoption plans that will enable them to progressively roll‑out increasingly productive workflows in their organizations.
Using your technical expertise as well as your excellent interpersonal, communication, and presentation skills, you will engage customers and prospects in seminars, conference calls, meetings, and through product evaluations to develop a shared vision for success.
MathWorks nurtures growth, appreciates inclusivity, encourages initiative, values teamwork, shares success, and rewards excellence.
Provide technical pre‑sales support and guidance to the India sales organization, prospects, and customers in the domains of signal processing, communications, and radarsystem design, as well as implementing these designs on FPGAs SoCs and SDRs through automatic HDL code generation and verification techniques by: