Analog Layout Engineer

Qualcomm; Bengaluru; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Qualcomm India Private Limited is seeking a Layout Engineer to develop block, macro, and chip-level layouts in alignment with project requirements and design schematics. The role requires strong knowledge of layout principles and the use of Cadence tools to verify designs and troubleshoot issues.

The candidate will work with internal and external stakeholders, applying design manuals and processes to ensure precise floorplans, routing, and verifications across analog and RF blocks as needed.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, ElectronicEngineering or related field with 2+ years designing custom layouts in relevant domain.
• OR Associate's degree with 4+ years designing custom layouts in relevant domain.
• OR High School diploma with 6+ years of relevant layout design experience.

Responsibilities

• Develops layouts and floorplans for blocks, macros, or chips per project specs.
• Applies design manuals and processes to create accurate layouts meeting requirements.
• Performs verification and debugging using established tools and methods.
• Collaborates with internal and external stakeholders to align on projects and resolve issues.

Skills

Analog/mixed-signal layout

Cadence Virtuoso

LVS/DRC debugging

Layout verification

EM/ESD/Parasitics understanding

Education

Bachelor's degree in Electrical Engineering or related field

Associate's degree in CS/Math/Electrical Eng

High School diploma or equivalent with relevant experience

Tools

Cadence tools (Cadence Virtuoso)

Calibre RVE

VXL

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Services Group, Engineering Services Group > Layout Engineer

General Summary:

Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.

Minimum Qualifications:

• • Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 2+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR High School diploma or equivalent and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
• • 2+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap).
• *Completed advanced degrees in a relevant field may be substituted for up to two years (Master's = one year, Doctorate = two years) of the general custom layout design work experience in a relevant domain (e.g., analog, mixed signal, RF, digital design).
• 3 to 6 years of industry experience in Mixed-Signal layout design, holding Bachelor's degree in electrical/Electronic Engineering.
• To work independently on block levels analog layout design from schematic. Which includes Estimating the Area, Optimizing Floorplan, Routing and Verifications.

Hands on experience in developing layouts for analog blocks like amplifiers, comparator, voltage/current reference circuits, Data converters and Timing Circuits. Experience on RF blocks such as LNAs, TX, RX, SYNTH and BBF blocks is an additional need.

Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 14nm FinFet and below.

Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence Virtuoso Layout Editor, VXL and Calibre RVE.

Good interpersonal skills and critical thinking abilities to resolve the issue technically and professionally. Excellent communication, Responsible for timely execution with high quality of layout design.

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