Analog Layout Engineer

onsemi; Bengaluru; On-site; INR 2,500,000 - 4,500,000; Full time

Job summary

onsemi in Bengaluru, India seeks a Senior Analog Layout Engineer for NEW PRODUCT DEVELOPMENT in Power Management. You will develop high quality layouts for AMS IP blocks, ensuring DRC/LVS/LEF and related checks using Cadence or Mentor Graphics tools.

Role involves floor planning, power routing, and collaboration with design engineers to deliver innovative PMIC and related devices for consumer, industrial, and automotive applications.

Qualifications

• BS in Electrical Engineering or related field required.
• Experience delivering high quality analog layout IPs.
• Strong understanding of layout fundamentals and best practices.
• Proficiency with CALIBRE DRC, ERC, LVS reports.
• Programming knowledge in SKILL, Perl, or Python is a bonus.
• Experience with Cadence or Mentor Graphics layout tools.
• Familiarity with semiconductor manufacturing processes and DFM techniques.

Responsibilities

• Produce high quality layout for complex AMS IP blocks (voltage regulators, bandgap, current sense-amp, amplifier, high voltage switches, drivers).
• Perform DRC, LVS, LVL, LEF generation, ERC, Antenna, Density and EM checks.
• Layout floor planning, power routing, latch-up and area optimization.

Skills

Layout fundamentals

CALIBRE DRC/ERC/LVS

Skill/Perl/Python scripting

Cadence/ Mentor Graphics

Unix OS

Team collaboration

Education

BS in Electrical Engineering

Tools

Cadence

Mentor Graphics

Job description

Job Description

Onsemi is seeking a Senior Analog Layout Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and e-fuses for consumer, industrial and automotive applications. In this role, you will focus on the following:

Produce high quality layout for complex AMS IP blocks (voltage regulators, bandgap, current sense-amp, amplifier, high voltage switches, drivers etc).

• Work on layouts of block/module level for integrated circuits from schematics. Verify using design rules provided by technology and design engineering.
• Work on layout floor planning of schematic block/module level, power routing, latch-up, ESD layout and area optimization using best layout techniques considering mismatch and process variations.
• Able to perform DRC, LVS, LVL, LEF generation, ERC, Antenna, Density and EM checks.
• Working with team members/design engineers for innovative, optimal solutions
• Using production quality workflow and documentation procedures

Qualifications

Minimum Requirements

• BS in Electrical Engineering or related 2 years of experience,
• Experience in delivering high quality analog layout IPs
• Good understanding of layout fundamentals and best practices
• Proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports
• Programming knowledge in SKILL, Perl, and/or Python is a bonus
• Experience with CADENCE or MENTOR GRAPHICS layout tools
• Solidunderstanding of semiconductor manufacturing process and DFM techniques
• Proficient at debugging/fixing LVS/DRC errors
• Must be familiar with Cadence Design Environment (CDE) and Unix OS
• Must have strong communication skills and be a team player

Company Overview

onsemi(Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here: https://www.onsemi.com/careers/career-benefits