Sr Staff Analog IC Design Engineer

Vishay Intertechnology, Inc.

Cork

On-site

EUR 90,000 - 130,000

Full time

3 days ago
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Job summary

Vishay Intertechnology, Inc. in Cork, Ireland is seeking a Senior Staff Analog Design Engineer to lead analog and mixed-signal IC development for power systems. You will architect IC blocks, supervise design reviews, and drive post-layout verification with a multidisciplinary team.

The role covers concept through silicon support, with opportunities to influence roadmap decisions and mentor junior engineers in a dynamic environment.

Qualifications

  • 7+ years of analog circuit design experience in ASIC/SOC environments.
  • Experience and knowledge of power conversion.
  • Analog/mixed-signal IC development cycles including design, simulation, validation.
  • Design and verification of analog and mixed-signal circuits including ADC, DAC, Reference & biasing circuits, Regulators DC-DC & LDO, Oscillator, PLL, Sensors, Drivers
  • CMOS/BiCMOS/BCD Process Technologies
  • AMS verification in subsystems and chips
  • Strong problem solving and mentoring abilities.

Responsibilities

  • Development of IC architectures.
  • Specification and design of analog & mixed-signal sub-systems.
  • Verification of design blocks at block-, system- and chip-level.
  • Active participation in product and technology roadmap planning and implementation.
  • Participation and leadership of design reviews for assigned areas of responsibility.
  • Low power ASIC design – from concept through to post-layout evaluation.
  • Design-For-Testability (DFT)
  • Maintenance of engineering documents in accordance with quality processes.
  • Structured tracking and implementation of design improvements.
  • Support for test-engineering, product engineering and operations as well as participation in ATE data reviews, limit reviews and device yield analysis.

Skills

Analog circuit design
AMS verification
Cross-functional teamwork
Problem solving

Education

PhD in Electronic Engineering

Tools

Cadence tools

Job description

Specifying and designing analog & mixed signal-sub-systems, from concept through to post-layout evaluation.

Simulating, testing and verifying design blocks at block-level, system-level and chip-level.

Designing and documenting test concepts and procedures, and maintaining the engineering documents

Leading or tracking reviews and tests to ensure VISHAY specifications are met, and implementing design improvements.

Support for test-engineering, product engineering and operations as well as participation in ATE data reviews, limit reviews and device yield analysis.

A job at this level…

Applies professional function-specific know how, methods, tools and principles on a range of functional subjects.

Elaborates, analyzes and documents product specifications, and adapts and proposes options for functionality or layout design.

Provides guidance to supportive technical staff, and oversee execution of assigned processes and transactions.

Creates comprehensive development reports, provides recommendations for management or general business operations.

May lead assigned parts of projects (categorized as workstreams of midsize or large projects), or manage rather small to medium product adaption projects, in cooperation with the customer.

Vishay Siliconix is a leader in the development of power semiconductor products which improve efficiency in electronic systems for consumer, industrial, automotive, medical, and military applications.

We are current looking for a Senior Staff Analog Design Engineer to join our team in Cork, Ireland, that is involved in development of integrated circuits at the heart of modern power systems.

In this position, the successful candidate will work with an experienced team and be exposed to the entire product lifecycle from definition and requirements through IC design to silicon support.

This is a varied role with the opportunity to create real impact within the organization and build a promising career.

Essential Duties and Responsibilities
  • Development of IC architectures.
  • Specification and design of analog & mixed-signal sub-systems.
  • Verification of design blocks at block-level, system-level and chip-level.
  • Active participation in product and technology roadmap planning and implementation.
  • Participation and leadership of design reviews for assigned areas of responsibility.
  • Low power ASIC design – from concept through to post-layout evaluation.
  • Design-For-Testability (DFT)
  • Maintenance of engineering documents in accordance with quality processes.
  • Structured tracking and implementation of design improvements.
  • Support for test-engineering, product engineering and operations as well as participation in ATE data reviews, limit reviews and device yield analysis.
Experience
  • 7+ years of analog circuit design experience in ASIC/SOC environments.
  • PhD, post-graduate or degree qualification in Electronic Engineering or similar.
  • Experience and knowledge of power conversion.
  • Experience with Cadence suite of analog design tools.
  • Analog/mixed-signal IC development cycles including design, simulation, validation.
  • Experience in design and verification of analog and mixed-signal circuits including ADC, DAC, Reference & biasing circuits, Regulators DC-DC & LDO, Oscillator, PLL, Sensors, Drivers
  • Experience of CMOS/BiCMOS/BCD Process Technologies
  • Experience of sub-system and chip-level verification including AMS verification
  • Self-motivated, individual contributor with strong problem solving skills.
  • Experience of working in wide-ranging roles and flexible environments.
  • Excellent interpersonal and communications skills.
  • The ability to work with cross-functional teams.
  • The ability to support and mentor less experienced team members

Vishay offers a comprehensive suite of benefit programs designed to help you achieve your personal and professional goals. With us, you'll experience unique career paths, an open and collaborative culture, a stable business that will be there for you, and opportunities to work globally and locally.

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