Senior Engineer, Digital Design Engineering

Analog Devices; Cork; On-site; EUR 85,000 - 120,000; Full time

Job summary

Analog Devices in Ireland seeks a Senior Digital Design Engineer to lead FPGA-based development for a mixed-signal SOC. You will prototype RTL, model and implement blocks, and work with architecture, verification, and analog teams to align digital system design with product roadmaps.

You will drive timing closure, low-power considerations, and manufacturing test readiness, while collaborating with customers and stakeholders to meet market needs.

Qualifications

• Architectural design of complex SoCs, esp. SoC with processors
• Deep knowledge of FPGA development flow
• FPGA modelling
• Verilog/SystemVerilog RTL design with emphasis on AXI/AHB
• Timing, area, low-power, manufacturing test and timing targets

Responsibilities

• FPGA RTL implementation and prototyping
• Modeling and self-checking mechanisms for FPGA
• HW & SW co-design and interaction with architecture teams
• Interaction with verification and analog teams
• Static timing analysis and timing constraint definition

Skills

FPGA prototyping

RTL design

Verilog/SystemVerilog

DFT/Testing

ARM Core

Education

Bachelor's or Master's in Electronics Eng

Tools

Verilog

SystemVerilog

UVM

Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today’s innovators stay Ahead of What’s Possible. Learn more at www.analog.com and on LinkedIn and X.

Senior Digital Design Engineer

Responsibilities

This position will involve many of the following tasks.

• FPGA prototyping of design

• Development of models &self checkingmechanisms for FPGA

• HW & S/W Codesign

• Architectural design and specification of blocks.

• Verilog/SystemVerilogRTL design

• Interaction withcustomerand stakeholders

• Design to meet timing, area, low-power, DFT, manufacturing test and timing targets for market

• All aspects of design workincludinginteraction with verification and analog team.

• Interaction withimplementationteam to convert RTL to silicon. Defining timing constraints and performing static timing analysis

• Working with architecture and design teams todeterminefunctionality protocols

Qualifications

Bachelor’s or Master’s degree, in Engineering (Electronic Engineering) or equivalent

• Architectural design and specification of complex systems, especially in system on chip with processors.

• Deep knowledge of FPGA development flow

• FPGA modelling

• Verilog/SystemVerilogRTL design - with emphasison AHB, AXI protocols and processor architecture on ARM cores.

• Design to meet timing, area, low-power, manufacturingtestand timing targets for market.

• All aspects of design workincludinginteraction with verification and analog team.

• Interaction withimplementationteam to convert RTL to silicon.

• Working with architecture and design teams todeterminefunctionality protocols

• Ability to work well in a diverse team environment

• Strong interpersonal,teamworkand communication skills arerequired.

• Precise documentation and attention to detail are essential.

• Quick to adoptnew technologies

• Ability to work well in a diverse team environment

• Strong interpersonal,teamworkand communication skills arerequired.

• Be self-motivated and enthusiastic.

• Goodproblem solvingskills.

• Architected design and specification of blocks and platforms.

• Act as design hub to interact with stakeholders – test, application, physical implementation, verification

• Design to meet area, low-power, manufacturingtestand timing targets.

• Intellectual Property (IP) block design and integration.

• Perform timing,powerand CDC analysis on design

• Verification of blocks using UVM.

• Mixed-signal integration and verification / co-simulation

• Working with product development teams to align digital system architecture and methodologies with product roadmap

#LI-RW1

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days