Senior Digital Design Engineer

MBRYONICS; Galway; On-site; EUR 85,000 - 120,000; Full time

Job summary

Mbryonics is seeking an experienced Digital Design Engineer to work on cutting-edge optical and photonic products for space telecommunications. You will contribute across IPs/ASICs/SoCs/FPGAs, delivering RTL design, verification, and leadership in a fast-paced environment.

The role involves system-level architectures, RTL validation, and mentoring junior engineers, with a strong focus on high-speed data applications and space-grade robustness.

Qualifications

• 7 to 10+ years of experience as a digital design or verification engineer with a proven track record of successful tape-outs and/or FPGA deployments.
• Strong proficiency in HDL languages such as SystemVerilog, Verilog, or VHDL.
• Extensive experience with RTL design and implementation.
• Demonstrated experience with prototyping systems on FPGA platforms or emulators.
• Proficiency in programming languages such as C/C++, and scripting languages such as Tcl/Perl/Python/shell-scripting.
• Solid knowledge of scripting and automation techniques.
• Comprehensive knowledge of the digital design process, digital design principles, and design (hw/sw) verification tools and techniques.
• Proven ability to work autonomously, precisely, and to drive innovation.
• Excellent communication, interpersonal, and leadership skills.
• Familiarity with Matlab and Simulink for modeling and simulation.
• Exceptional collaboration skills and the ability to work effectively in a multi-functional team environment.
• Self-motivated and proactive with a strong sense of ownership.

Responsibilities

• Take direct responsibility for the full delivery of digital designs, ensuring they meet performance, schedule, and quality targets across all design phases, including research, definition, design, simulation, and both top-level and module-level verification.
• Define, refine and document system-level and module-level architectures, considering factors such as performance, power, area, and testability.
• Author comprehensive requirements documentation, including functional specifications, interface definitions, and verification plans.
• Develop detailed low-level design implementations based on specification documents.
• Develop High-Level Models to facilitate design exploration and verification processes.
• Conduct thorough reviews of design specifications and RTL code to ensure quality and correctness.
• Drive the development of RTL design of block-level modules.
• Verify designs using advanced SystemVerilog and UVM methodologies.
• Conduct simulations at both block and top levels to ensure compliance with design specifications, functionality, and timing requirements.
• Define and execute comprehensive block-level and top-level test plans.
• Validate circuit functionality and performance in the lab environment.
• Document and rigorously review design processes and outcomes.
• Provide technical leadership and mentorship to junior engineers, fostering their professional growth and development.
• Support and contribute to Flow & Methodology improvements to enhance design efficiency and quality.

Skills

SystemVerilog

Verilog

VHDL

FPGA development

RTL design

UVM

C/C++

Python

Leadership

Tools

FPGA development tools

Job description

Mbryonics are seeking an experienced Digital Design Engineer to work on innovative Optical and Photonic products for space telecommunications applications. You will work across a range of products, requiring expertise across IPs/ASICs/SoCs/FPGAs.

You will need to have significant and proven experience in Digital Design for High-speed communications products, for context, our flagship product STARCOM supports data rates up to 400Gbps over extremely long distances (80,000km+ link distance). If you have experience developing FPGAs, ICs, SoCs, FEC (LDPC/RS) etc for RadHard/harsh environments, Aerospace or space applications it would be beneficial.

We are passionate about digital design and verification techniques, we pioneer and push technical boundaries, this role will be well suited to those who are excited about the prospect of working in an environment where they can make meaningful contributions, innovate and deliver.

Responsibilities:

• Take direct responsibility for the full delivery of digital designs, ensuring they meet performance, schedule, and quality targets across all design phases, including research, definition, design, simulation, and both top-level and module-level verification.
• Define, refine and document system-level and module-level architectures, considering factors such as performance, power, area, and testability.
• Author comprehensive requirements documentation, including functional specifications, interface definitions, and verification plans.
• Develop detailed low-level design implementations based on specification documents.
• Develop High-Level Models to facilitate design exploration and verification processes.
• Conduct thorough reviews of design specifications and RTL code to ensure quality and correctness.
• Drive the development of RTL design of block-level modules.
• Verify designs using advanced SystemVerilog and UVM methodologies.
• Conduct simulations at both block and top levels to ensure compliance with design specifications, functionality, and timing requirements.
• Define and execute comprehensive block-level and top-level test plans.
• Validate circuit functionality and performance in the lab environment.
• Document and rigorously review design processes and outcomes.
• Provide technical leadership and mentorship to junior engineers, fostering their professional growth and development.
• Support and contribute to Flow & Methodology improvements to enhance design efficiency and quality.

Qualifications:

• 7 to 10+ years of experience as a digital design or verification engineer with a proven track record of successful tape-outs and/or FPGA deployments.
• Strong proficiency in HDL languages such as SystemVerilog, Verilog, or VHDL.
• Extensive experience with RTL design and implementation.
• Demonstrated experience with prototyping systems on FPGA platforms or emulators.
• Proficiency in programming languages such as C/C++, and scripting languages such as Tcl/Perl/Python/shell-scripting.
• Solid knowledge of scripting and automation techniques.
• Comprehensive knowledge of the digital design process, digital design principles, and design (hw/sw) verification tools and techniques.
• Proven ability to work autonomously, precisely, and to drive innovation.
• Excellent communication, interpersonal, and leadership skills.
• Familiarity with Matlab and Simulink for modeling and simulation.
• Exceptional collaboration skills and the ability to work effectively in a multi-functional team environment.
• Self-motivated and proactive with a strong sense of ownership.

We encourage enthusiastic individuals who are passionate about advancing their knowledge and skills in digital design and verification and who are eager to take on leadership responsibilities to apply for this exciting opportunity.

What’s In It For You

Career Growth: Contribute to a world-class space-age communication program while developing your leadership skills in a state-of-the-art manufacturing environment

Collaboration: Work with talented professionals across disciplines to drive impactful solutions

Innovation: Be part of a team pioneering advancements in manufacturing engineering for cutting-edge FSO systems

Work-Life Balance: Enjoy flexible work schedules and a comprehensive benefits package

Diversity, Inclusion and Equal Opportunities

Core ethical values, diversity and inclusion are invaluable to MBRYONICS’ business success. We recognise that the broad perspectives that result from recruiting, developing and retaining a globally diverse workforce promotes innovation and helps us succeed as a business enterprise. It is the policy and practice of the Company to provide equal opportunities to all employees and applicants. The Company will not tolerate discrimination on the basis of gender, race, religion, sexual orientation, gender identity, civil status, family status, disability, age, or membership of the Traveller community.