Space ASIC Design Engineer — RTL & SoC Innovator

AST SpaceMobile; City of Edinburgh; On-site; GBP 50,000 - 75,000; Full time

Job summary

AST SpaceMobile, located in Edinburgh, is looking for an ASIC Design Engineer to help develop complex silicon solutions for space-based communications. The role includes responsibilities such as high-quality RTL development and collaboration with various engineering teams.

The ideal candidate will have a BEng in a relevant discipline and strong skills in SystemVerilog, SoC integration, and Python programming. Experience with high-speed I/O or RF knowledge will be a plus.

Qualifications

• Deep knowledge of hardware and digital design fundamentals.
• Strong SystemVerilog knowledge.
• Experience with SoC integration.
• Ability to write clear, high-quality micro-architecture specifications.
• Prior experience on complex RTL designs.

Responsibilities

• Create high-quality micro-architecture specifications and RTL code.
• Contribute to SoC integration and subsystem development.
• Work with internal and external stakeholders on design.
• Participate in design reviews, providing technical input.
• Ensure alignment with requirements and best practices.

Skills

Hardware and digital design fundamentals

SystemVerilog

SoC integration

Python scripting or programming

RF knowledge

Digital signal processing

MATLAB

Education

BEng in Electrical Engineering, Computer Engineering, Computer Science, or related discipline

Master’s or PhD degree in a relevant technical discipline

Tools

SystemVerilog

Python

MATLAB

Job description

AST SpaceMobile is building the first and only global cellular broadband network in space to operate directly with standard, unmodified mobile devices based on our extensive IP and patent portfolio and designed for both commercial and government applications. Our engineers and space scientists are on a mission to eliminate the connectivity gaps faced by today’s five billion mobile subscribers and finally bring broadband to the billions who remain unconnected.

Position Overview

We are seeking an ASIC Design Engineer to contribute to the design and implementation of complex silicon solutions used in AST’s space‑based communications systems.

The Silicon Team in Edinburgh is a small, highly focused group responsible for developing high‑value silicon that is core to AST’s mission of “Connecting the unconnected” - delivering the world’s first space‑based mobile broadband network.

The team works collaboratively to define and build next‑generation silicon, exploring advanced silicon technologies to continuously improve performance, capability, and efficiency. This is a hands‑on environment where silicon decisions directly impact AST’s ability to deliver a global communications network from space.

In this role, you will focus on high‑quality RTL development, micro‑architecture definition, and close collaboration across engineering disciplines. You will work alongside architecture, verification, and system teams—both internal and external—to deliver robust, high‑performance ASIC and SoC designs from concept through tape‑out.

Key Responsibilities:

• Create high‑quality micro‑architecture specifications and RTL code.
• Contribute to SoC integration and subsystem development.
• Work with internal and external stakeholders, including architecture, verification, and software teams.
• Participate in design reviews, providing technical input.
• Ensure alignment with requirements and design best practices.

Qualifications

Education:

BEng in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.

Experience:

• Deep knowledge of hardware and digital design fundamentals.
• Strong SystemVerilog knowledge.
• Experience with SoC integration.
• Prior experience on complex RTL designs such as high‑speed I/O, CPUs, accelerators, or complex network‑on‑chip implementations.
• Ability to write clear, high‑quality micro‑architecture specifications.
• Competency in Python scripting or programming.

Preferred Qualifications:

• Master’s or PhD degree in a relevant technical discipline.
• Experience on large SoC / ASIC designs.
• RF knowledge is a strong plus.
• Understanding of digital signal processing.
• Experience with MATLAB is a plus.
• Background in communications or mobile silicon system design.

Soft Skills:

• Ability to collaborate closely with architecture, verification, software, and system teams.
• Ability to work effectively with internal and external stakeholders.
• Ability to provide technical input during design reviews.

Technology Stack:

• SystemVerilog
• Python scripting or programming
• MATLAB

Physical Requirements

• Ability to work in a standard office environment and use a computer for extended periods.
• Occasional travel may be required to visit suppliers or other AST SpaceMobile design centers.

This job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands_._

AST SpaceMobile is an Equal Opportunity, at will Employer; employment is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.