Senior Verification Engineer

DCV Technologies; Remote; GBP 60,000 - 80,000; Full time

Job summary

A leading technology organisation in the UK seeks an experienced Senior Verification Engineer to work on advanced RF and DSP signal-chain verification. This contract role emphasizes robust verification environments and validating complex algorithms. Essential skills include ASIC verification experience, expertise in UVM, and solid DSP verification knowledge. The position offers competitive market rates and the flexibility of remote work.

Benefits

Remote working

Qualifications

• Strong experience as a Verification Engineer / ASIC Verification Engineer.
• Proven expertise in UVM and class-based verification.
• Solid background in DSP verification including FFT and FIR.

Responsibilities

• Develop and maintain UVM verification testbenches.
• Verify DSP/RF signal-chain components including FFT and FIR filters.
• Integrate VIP and manage constrained-random testing.

Skills

ASIC Verification

DSP Verification

UVM

Python

Git

Tools

MATLAB

Vivado

Vitis

Job description

Senior Verification Engineer - RF / DSP (Contract)

We're working with a leading technology organisation seeking an experienced Senior Verification Engineer to support advanced RF and DSP signal‑chain verification on a high‑impact project.

This is a hands‑on contract role, ideal for someone with strong ASIC / SoC verification experience and deep exposure to DSP blocks.

The Role

You'll take ownership of block‑level verification for DSP and RF signal‑chain components, working closely with design and system teams. The focus is on building and maintaining robust verification environments and validating complex algorithms.

Key Responsibilities

• Develop and maintain UVM, class‑based verification testbenches
• Verify DSP/RF signal‑chain blocks including FFT, FIR filters and channelizers
• Integrate VIP and drive constrained‑random and coverage‑driven verification
• Automate regressions using Python scripting
• Work within CI/CD environments and version control using Git
• Support ASIC / SoC / FPGA verification flows

Essential Skills & Experience

• Strong experience as a Verification Engineer / ASIC Verification Engineer
• Proven UVM and class‑based verification expertise
• Solid background in DSP verification (FFT, FIR, signal processing)
• Python for automation and regression
• Experience with SoC / ASIC / FPGA environments
• Git version control

Desirable

• MATLAB experience
• Exposure to Vivado / Vitis or adaptive SoC flows

Contract role | Market rate | Remote working

If you're a senior, hands‑on verification engineer looking for a challenging DSP‑focused contract, apply now or get in touch for more details