Senior System Performance Architect: Co-Design Excellence

Huawei; Cambridge; On-site; GBP 90,000 - 130,000; Full time

Benefits offered by this job

Pension plan

Bonus incentives

Learning & development time off

Sports club

Job summary

Huawei UK (R&D) Cambridge is seeking a senior researcher to drive advanced system performance modeling and simulator development, integrating software and hardware to boost efficiency. You will lead tool development (gem5) and build benchmarks to push CPU microarchitecture optimization while aligning with product planning.

This role requires a Master's or higher degree and hands-on experience in chip performance modeling and software-hardware co-design, with strong analytical skills and a track

Qualifications

• Master's degree or higher in IC, Microelectronics, Computer Science, or related fields.
• Experience with chip performance modeling, simulation, and collaborative software-hardware optimization.
• Proficiency with system performance modeling tools such as gem5 or QEMU.

Responsibilities

• Perform system performance modeling and simulation to optimize software and hardware together.
• Identify bottlenecks and hotspots to guide software architecture and hardware acceleration.
• Develop performance models for software load and chip architecture, supporting product planning.
• Lead the development and maintenance of the gem5 emulator for detailed evaluation.
• Build benchmarks aligned with terminal software characteristics to guide CPU microarchitecture optimization.

Skills

System performance modeling

Software-hardware co-design

CPU microarchitecture optimization

Benchmark construction

Chip performance analysis

Education

Master's or higher in IC/Microelectronics/CS/Communication

Tools

gem5

QEMU

Job description

Huawei UK (R&D) Cambridge is seeking a senior researcher to drive advanced system performance modeling and simulator development, integrating software and hardware to boost efficiency. You will lead tool development (gem5) and build benchmarks to push CPU microarchitecture optimization while aligning with product planning.

This role requires a Master's or higher degree and hands-on experience in chip performance modeling and software-hardware co-design, with strong analytical skills and a track