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Dstl is seeking a Senior Cyber Digital Signal Processing (DSP) and Embedded Engineer to design and deliver DSP, embedded software and FPGA-based solutions with real-world impact. You will work within multidisciplinary teams to solve complex problems across software and hardware domains, influencing direction and mentoring others.
The role emphasizes practical problem-solving, systems thinking and continuous improvement of engineering practices, tools and ways of working.
As a Senior Cyber Digital Signal Processing (DSP) and Embedded Engineer, you will work on complex and technically challenging projects, designing and delivering innovative signal processing, embedded software and FPGA-based solutions that have a real-world operational impact.
Working within multidisciplinary teams of engineers, scientists and technical specialists, you'll solve complex problems across software and hardware domains, influence technical direction, and help shape future capabilities. You'll have the opportunity to work with cutting-edge technologies, contribute to mission-critical programmes, and collaborate with partners across government, industry and academia.
This role is ideal for engineers who enjoy tackling difficult technical challenges, combining deep technical expertise with practical problem-solving and systems thinking. Alongside delivering innovative solutions, you'll help develop technical capability across the organisation through mentoring, technical leadership and knowledge sharing.
You'll be supported to maintain and grow your professional expertise, explore emerging technologies and contribute to the continuous improvement of engineering practices, tools and ways of working.
This role is eligible for an additional specialist allowance of £2758 annually subject to meeting extended onboarding requirements. The role may be eligible for additional skills allowances depending on the skills and experience of the applicant.
You should have experience in at least two of the following areas:
You will also be able to demonstrate: