Senior ASIC Verification

Chipright; United Kingdom; Remote; GBP 65,000 - 85,000; Full time

Job summary

A technology company in the UK is seeking a Senior IP Verification Engineer. The role involves managing verification for designs and creating UVM-based test environments. Ideal candidates possess a Master's degree and over 8 years of verification experience using System Verilog and UVM. Strong teamwork and communication are essential for this role.

Qualifications

• 8+ years of experience in verification using System Verilog and UVM.
• Experience in developing verification test plans and directed/randomized test cases.
• Experience from Formal Verification.

Responsibilities

• Take full responsibility for verification of a design.
• Define and implement UVM based test environments.
• Develop, run and debug test cases.

Skills

System Verilog

UVM

Team cooperation

English communication

Result-driven

Education

MSc degree in a technical field

Tools

Cadence verification suite

vManager

vPlans

Job description

Overview

Senior IP Verification Engineer

Responsibilities

• Take full responsibility for verification of a design, being block or sub-system
• Define and implement UVM based test environments
• Break-down Requirements and create Verification Specifications, including verification strategy for the design object and associated verification plan
• Executing Verification Strategy, with creating UVM test benches
• Develop, run and debug test cases
• Work with Coverage Closure to reach Quality goals
• Continuously improve and optimize ways of working
• Generate documentation
• Develop competence in technical domain

Qualifications

• A MSc degree in a technical field or the equivalent level of education
• 8+ years’ experience from verification using System Verilog and UVM.
• Experience in developing verification test plans and directed/randomized test cases
• Good team cooperation skills
• Good communication in English
• Skills in result-driven and meet expectations

Additional Requirements

• Experience using Cadance verification suite
• Experience using vManager and vPlans
• Experience from Formal Verification
• Experience in Agile way of working