RF Layout Engineer (Analog) - Cadence Virtuoso Expert

MediaTek; Cambourne; On-site; GBP 60,000 - 90,000; Full time

Job summary

MediaTek, a global leader in semiconductor innovation, is seeking an Experienced Layout Engineer in the UK (Cambourne) to design and optimise analogue and RF layouts. You will use Cadence Virtuoso to create and verify layouts and collaborate closely with circuit design engineers to meet performance targets.

Responsibilities include layout verification (DRC, LVS, parasitic extraction) and ongoing optimisation for area, power, and noise.

Qualifications

• Required: Bachelor's or Master's in Electronics Engineering or related field.
• Proven experience in analogue and RF layout design.
• Proficient with CAD tools, especially Cadence Virtuoso.
• Solid circuit fundamentals and design principles.
• Excellent problem-solving and attention to detail.
• Strong communication and teamwork abilities.

Responsibilities

• Design and develop complex analogue and RF layouts for high performance.
• Use CAD tools to create and verify layouts (Cadence Virtuoso).
• Collaborate with circuit design engineers to meet requirements.
• Perform layout verification (DRC, LVS, parasitic extraction).
• Optimize layouts for performance, area, and power.
• Keep up-to-date with industry trends and new design flows.
• Collaborate effectively within a team and innovative culture.

Skills

Analogue RF layout experience

Cadence Virtuoso proficiency

Team collaboration

Problem-solving

Communication skills

Learning agility

Education

Bachelor's or Master's in Electronics Engineering

Tools

Cadence Virtuoso

Job description

MediaTek, a global leader in semiconductor innovation, is seeking an Experienced Layout Engineer in the UK (Cambourne) to design and optimise analogue and RF layouts. You will use Cadence Virtuoso to create and verify layouts and collaborate closely with circuit design engineers to meet performance targets.

Responsibilities include layout verification (DRC, LVS, parasitic extraction) and ongoing optimisation for area, power, and noise.