Research Fellow: Analog Computing for Next-Gen Communication

Institute for Modern

Guildford

Hybrid

GBP 38,000 - 47,000

Full time

8 days ago

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Job summary

The Institute for Communication Systems (ICS) at the University of Surrey invites applications for a Research Fellow in Analog Computing for Advanced Communication Systems. You will join the Wireless Systems Lab and collaborate with industrial and academic partners worldwide.

You will research ultra-low-power analog and mixed-signal architectures for future communication systems, with emphasis on receiver processing and co-design of algorithms and hardware.

Qualifications

  • Strong knowledge and research experience in analogue circuit design for low-power signal processing, computing or communication applications.
  • Experience in circuit-level modelling and simulation, including evaluating power/energy consumption and non-idealities.
  • Experience or strong knowledge of algorithm–hardware co-design, mapping operations to hardware under noise, precision and variability constraints.
  • Strong analytical, modelling and programming skills, including MATLAB and/or Python, and ability to communicate research findings effectively.

Responsibilities

  • Undertake research into ultra-low-power analog and mixed-signal computing architectures for future communication systems, focusing on receiver processing and reducing reliance on high-resolution ADCs.
  • Co-design algorithms and hardware; model, simulate and evaluate architectures for performance, power, latency, precision and complexity.

Skills

Analog circuit design
Circuit-level modelling
Algorithm–hardware co-design
MATLAB
Python

Tools

MATLAB
Python

Job description

The Institute for Communication Systems (ICS) at the University of Surrey invites applications for a Research Fellow in Analog Computing for Advanced Communication Systems. You will join the Wireless Systems Lab and collaborate with industrial and academic partners worldwide.

You will research ultra-low-power analog and mixed-signal architectures for future communication systems, with emphasis on receiver processing and co-design of algorithms and hardware.

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