Principal FPGA Engineer

Mary Ann s Recruitment Services Ltd; Oxford; On-site; GBP 90,000 - 110,000; Full time

Job summary

Mary Ann s Recruitment Services Ltd in Oxford is seeking a Principal FPGA Engineer to convert advanced wireless algorithms into real-time FPGA implementations for a SDR modem platform. You will collaborate across PHY, software and systems engineering to shape hardware-realisable architectures for the next generation.

The role requires 5+ years in FPGA-based DSP/communications, strong VHDL/Verilog/SystemVerilog, and expertise in fixed-point, timing analysis, and high-throughput streaming designs.

Qualifications

• At least 5 years of industry experience developing FPGA-based DSP or communications systems.
• Strong FPGA design experience using VHDL, Verilog, or SystemVerilog.
• Deep understanding of fixed-point arithmetic, quantisation effects, numerical precision, and hardware implementation trade-offs.
• Experience implementing high-performance parallelised DSP algorithms on FPGA platforms.
• Experience implementing FFTs, Hadamard transforms, digital filtering, synchronisation, channel estimation, forward error correction, beamforming, or packet-processing pipelines.
• Experience designing high-throughput streaming architectures using AXI-Stream or equivalent interfaces.
• Experience analysing FPGA timing, resource utilisation, and system performance.
• Familiarity with MATLAB, Python, or equivalent modelling environments for algorithm validation.
• Strong debugging and problem-solving skills in laboratory environments.
• Ability to work closely with DSP, software, systems, and RF engineers.

Responsibilities

• Transform advanced wireless communication algorithms into efficient, real-time FPGA implementations for an FPGA-accelerated SDR modem platform.
• Collaborate with PHY, software, and systems engineers to define hardware-realisable architecture for next-generation intelligent SDR modem.
• Translate floating-point communications algorithms into high-performance fixed-point FPGA implementations suitable for field deployment.
• Take a hands-on role in DSP architecture, FPGA implementation, optimisation, integration, verification, and system bring-up.

Skills

FPGA design

DSP algorithms

VHDL

Verilog

SystemVerilog

Fixed-point arithmetic

AXI-Stream

Python

MATLAB

Debugging

Collaboration

Tools

MATLAB/Simulink

Python

Verilog

VHDL

SystemVerilog

Job description

Salary: £100,000 - 100,000 per year

Requirements

• We require at least 5 years of industry experience developing FPGA-based DSP or communications systems.
• We require strong FPGA design experience using VHDL, Verilog, or SystemVerilog.
• We require a strong understanding of fixed-point arithmetic, quantisation effects, numerical precision, and hardware implementation trade-offs.
• We require experience implementing high-performance parallelised DSP algorithms on FPGA platforms.
• We require practical experience implementing one or more of the following: FFTs, fast Hadamard transforms, digital filtering, synchronisation algorithms, channel estimation, forward error correction, beamforming, or packet-processing pipelines.
• We require experience designing high-throughput streaming architectures using AXI-Stream or equivalent interfaces.
• We require experience analysing FPGA timing, resource utilisation, and system performance.
• We require familiarity with MATLAB, Python, or equivalent modelling environments for algorithm validation.
• We require strong debugging and problem-solving skills in laboratory environments.
• We require the ability to work closely with DSP, software, systems, and RF engineers.

Responsibilities

• We transform advanced wireless communication algorithms into efficient, real-time FPGA implementations for an FPGA-accelerated SDR modem platform.
• We work closely with PHY, software, and systems engineers to define the hardware-realisable architecture for our next-generation intelligent SDR modem.
• We translate floating-point communications algorithms into high-performance fixed-point FPGA implementations suitable for field deployment.
• We take a hands-on role in DSP architecture, FPGA implementation, optimisation, integration, verification, and system bring-up.

Technologies

• FPGA
• Hardware
• Matlab
• Python
• SystemVerilog
• Verilog
• VHDL

More:

We are an early-stage, fast-paced, independently funded start-up with strong links to the University of Oxford. We are led by a talented team with considerable sector experience and specialist subject knowledge, and our mission is to enable safe and efficient communication systems that help protect our way of life. This is a Principal FPGA Engineer role based in Oxford, with onsite working one day per week before moving to remote working, and the salary is £90,000 to £100,000 per year plus benefits. This is a career-defining opportunity to contribute to critical technology that will shape the future of wireless communications and help save lives.

last updated 33 week of 2026